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refs:getOpcode (Results
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<<11121314151617181920>>
/external/llvm/lib/Target/NVPTX/ |
NVPTXGenericToNVVM.cpp | 308 unsigned Opcode = C->getOpcode(); 352 return Builder.CreateBinOp(Instruction::BinaryOps(C->getOpcode()), 357 return Builder.CreateCast(Instruction::CastOps(C->getOpcode()),
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/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |
/dalvik/dexgen/src/com/android/dexgen/dex/code/ |
DalvInsnList.java | 204 (insn.getOpcode().getFamily() == DalvOps.INVOKE_STATIC);
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/dalvik/dx/src/com/android/dx/dex/code/ |
DalvInsnList.java | 204 (insn.getOpcode().getFamily() == Opcodes.INVOKE_STATIC);
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 60 switch (MI->getOpcode()) { 124 unsigned EOP = (llvm::next(I)->getOpcode() == AMDGPU::RETURN) ? 1 : 0; 138 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode())) 247 switch (Op.getOpcode()) { 271 // break out of case ISD::INTRINSIC_VOID in switch(Op.getOpcode()) 325 // break out of case ISD::INTRINSIC_WO_CHAIN in switch(Op.getOpcode()) 328 } // end switch(Op.getOpcode())
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/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
SymbolManager.h | 361 BinaryOperator::Opcode getOpcode() const { return Op; } 396 Profile(ID, LHS, getOpcode(), RHS, getType()); 431 Profile(ID, LHS, getOpcode(), RHS, getType()); 465 Profile(ID, LHS, getOpcode(), RHS, getType());
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/external/clang/lib/AST/ |
ExprClassification.cpp | 212 switch (cast<UnaryOperator>(E)->getOpcode()) { 515 if (E->getOpcode() == BO_Comma) 521 if (E->getOpcode() == BO_PtrMemD) 529 if (E->getOpcode() == BO_PtrMemI)
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/external/clang/lib/StaticAnalyzer/Checkers/ |
CStringSyntaxChecker.cpp | 114 if (BE->getOpcode() == BO_Sub) {
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IdempotentOperationChecker.cpp | 157 BinaryOperator::Opcode Op = B->getOpcode(); 390 if (B->getOpcode() == BO_Assign) 674 if (B->getOpcode() == BO_Sub || B->getOpcode() == BO_Add)
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
DalvInsnList.java | 205 (insn.getOpcode().getFamily() == Opcodes.INVOKE_STATIC);
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/external/llvm/include/llvm/MC/ |
MCInst.h | 158 unsigned getOpcode() const { return Opcode; }
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/external/llvm/lib/CodeGen/SelectionDAG/ |
ResourcePriorityQueue.cpp | 86 switch (ScegN->getOpcode()) { 123 switch (ScegN->getOpcode()) { 455 switch (N->getOpcode()) { 562 switch(N->getOpcode()) {
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/external/llvm/lib/Target/AArch64/ |
AArch64MCInstLower.cpp | 148 OutMI.setOpcode(MI->getOpcode());
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AArch64RegisterInfo.cpp | 127 if (MI.getOpcode() == AArch64::ADDxxi_lsl0_s) {
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAsmBackend.cpp | 162 if (getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode()) 204 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode()); 207 if (RelaxedOp == Inst.getOpcode()) {
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/external/llvm/lib/Target/Hexagon/ |
HexagonSplitConst32AndConst64.cpp | 83 int Opc = MI->getOpcode();
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/external/llvm/lib/Target/Mips/ |
MipsMCInstLower.cpp | 156 OutMI.setOpcode(MI->getOpcode());
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/external/llvm/lib/Target/SystemZ/ |
SystemZRegisterInfo.cpp | 84 unsigned Opcode = MI->getOpcode();
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/external/llvm/lib/Target/X86/Disassembler/ |
X86Disassembler.cpp | 250 uint32_t Opcode = mcInst.getOpcode(); 412 uint32_t Opcode = mcInst.getOpcode(); 695 if(mcInst.getOpcode() == X86::REP_PREFIX) 697 else if(mcInst.getOpcode() == X86::REPNE_PREFIX)
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/external/llvm/lib/Target/X86/InstPrinter/ |
X86IntelInstPrinter.cpp | 36 const MCInstrDesc &Desc = MII.get(MI->getOpcode());
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/external/mesa3d/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 60 switch (MI->getOpcode()) { 124 unsigned EOP = (llvm::next(I)->getOpcode() == AMDGPU::RETURN) ? 1 : 0; 138 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode())) 247 switch (Op.getOpcode()) { 271 // break out of case ISD::INTRINSIC_VOID in switch(Op.getOpcode()) 325 // break out of case ISD::INTRINSIC_WO_CHAIN in switch(Op.getOpcode()) 328 } // end switch(Op.getOpcode())
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/dalvik/dx/src/com/android/dx/ssa/back/ |
SsaToRop.java | 146 && (insns.get(0).getOpcode() == Rops.GOTO)) { 282 Rop opcode = lastInsn.getOpcode();
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/external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
SsaToRop.java | 147 && (insns.get(0).getOpcode() == Rops.GOTO)) { 283 Rop opcode = lastInsn.getOpcode();
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/external/llvm/lib/Target/R600/ |
AMDGPUIndirectAddressing.cpp | 216 if (MI.getOpcode() == AMDGPU::PHI) { 328 if (DefInstr->getOpcode() == AMDGPU::PHI) {
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SIInstrInfo.cpp | 80 unsigned Opc = I->getOpcode(); 195 MI->setDesc(get(commuteOpcode(MI->getOpcode())));
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<<11121314151617181920>>