| /external/llvm/include/llvm/ADT/ |
| APInt.h | 193 APInt shlSlowCase(unsigned shiftAmt) const;
515 unsigned shiftAmt = numBits - hiBitsSet;
518 return APInt(numBits, ~0ULL << shiftAmt);
519 return getAllOnesValue(numBits).shl(shiftAmt);
745 /// Shifts *this left by shiftAmt and assigns the result to *this.
747 /// \returns *this after shifting left by shiftAmt
748 APInt &operator<<=(unsigned shiftAmt) {
749 *this = shl(shiftAmt);
839 /// Arithmetic right-shift this APInt by shiftAmt.
840 APInt ashr(unsigned shiftAmt) const
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 608 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
609 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
614 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
616 DemandedMaskIn |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
622 KnownZero <<= ShiftAmt;
623 KnownOne <<= ShiftAmt;
625 if (ShiftAmt)
626 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
632 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
635 APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
[all...] |
| InstCombineCasts.cpp | 569 uint32_t ShiftAmt = KnownZeroMask.logBase2();
571 if (ShiftAmt) {
572 // Perform a logical shr by shiftamt.
574 In = Builder->CreateLShr(In, ConstantInt::get(In->getType(),ShiftAmt),
709 uint64_t ShiftAmt = Amt->getZExtValue();
710 BitsToClear = ShiftAmt < BitsToClear ? BitsToClear - ShiftAmt : 0;
[all...] |
| /external/llvm/lib/Support/ |
| APInt.cpp | 1030 /// Arithmetic right-shift this APInt by shiftAmt.
1032 APInt APInt::ashr(const APInt &shiftAmt) const {
1033 return ashr((unsigned)shiftAmt.getLimitedValue(BitWidth));
1036 /// Arithmetic right-shift this APInt by shiftAmt.
1038 APInt APInt::ashr(unsigned shiftAmt) const {
1039 assert(shiftAmt <= BitWidth && "Invalid shift amount");
1041 if (shiftAmt == 0)
1046 if (shiftAmt == BitWidth)
1051 (((int64_t(VAL) << SignBit) >> SignBit) >> shiftAmt));
1058 if (shiftAmt == BitWidth)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Analysis/ |
| ValueTracking.cpp | 487 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth);
490 KnownZero <<= ShiftAmt;
491 KnownOne <<= ShiftAmt;
492 KnownZero |= APInt::getLowBitsSet(BitWidth, ShiftAmt); // low bits known 0
500 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth);
505 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
506 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt);
508 KnownZero |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
516 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
521 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
[all...] |
| ConstantFolding.cpp | 171 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1);
182 ConstantInt::get(Src->getType(), ShiftAmt));
183 ShiftAmt += isLittleEndian ? SrcBitSize : -SrcBitSize;
203 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1);
208 ConstantInt::get(Src->getType(), ShiftAmt));
209 ShiftAmt += isLittleEndian ? DstBitSize : -DstBitSize;
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 84 unsigned ShiftAmt = Log2_32(MemSize);
85 O << " #" << ShiftAmt;
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/test/Transforms/SimplifyCFG/X86/ |
| switch_to_lookup_table.ll | 97 ; CHECK-NEXT: %switch.shiftamt = mul i32 %switch.tableidx, 8
98 ; CHECK-NEXT: %switch.downshift = lshr i32 89655594, %switch.shiftamt
234 ; CHECK-NEXT: %switch.shiftamt = mul i59 %switch.cast, 1
235 ; CHECK-NEXT: %switch.downshift = lshr i59 -288230375765830623, %switch.shiftamt
289 ; CHECK: %switch.downshift = lshr i9 3, %switch.shiftamt
|
| /external/llvm/lib/IR/ |
| ConstantFold.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 830 unsigned ShiftAmt = Shift.getConstantOperandVal(1);
831 if (ShiftAmt != 1 && ShiftAmt != 2 && ShiftAmt != 3)
836 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, VT);
850 AM.Scale = 1 << ShiftAmt;
[all...] |
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| GVN.cpp | [all...] |
| /external/llvm/unittests/ADT/ |
| APIntTest.cpp | 19 // Test that APInt shift left works when bitwidth > 64 and shiftamt == 0
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | [all...] |
| /external/llvm/lib/Transforms/Utils/ |
| SimplifyCFG.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 749 SDValue ShiftAmt = TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtTy);
751 Op.getValueType(), InOp, ShiftAmt));
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
