| /external/llvm/test/CodeGen/Mips/ |
| seteqz.ll | 14 ; 16: sltiu ${{[0-9]+}}, 1
21 ; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 1
|
| setultk.ll | 17 ; 16: sltiu ${{[0-9]+}}, 10 # 16 bit inst
|
| seteq.ll | 17 ; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 1
|
| setcc-se.ll | 6 ; CHECK: sltiu ${{[0-9]+}}, $4, 1
92 ; CHECK: sltiu $[[R0:[0-9]+]], $4, 32767
125 ; CHECK: sltiu $[[R0:[0-9]+]], $4, -32768
|
| cmov.ll | 156 ; sltiu instructions.
159 ; O32: sltiu $[[R0:[0-9]+]], ${{[0-9]+}}, 32767
180 ; O32: sltiu $[[R0:[0-9]+]], ${{[0-9]+}}, -32768
|
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-mips.cc | 363 COMPARE(sltiu(a0, a1, 0),
364 "2ca40000 sltiu a0, a1, 0");
365 COMPARE(sltiu(s0, s1, 32767),
366 "2e307fff sltiu s0, s1, 32767");
367 COMPARE(sltiu(t2, t3, -32768),
368 "2d6a8000 sltiu t2, t3, -32768");
369 COMPARE(sltiu(v0, v1, -1),
370 "2c62ffff sltiu v0, v1, -1");
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 373 COMPARE(sltiu(a0, a1, 0),
374 "2ca40000 sltiu a0, a1, 0");
375 COMPARE(sltiu(s0, s1, 32767),
376 "2e307fff sltiu s0, s1, 32767");
377 COMPARE(sltiu(t2, t3, -32768),
378 "2d6a8000 sltiu t2, t3, -32768");
379 COMPARE(sltiu(v0, v1, -1),
380 "2c62ffff sltiu v0, v1, -1");
|
| /external/llvm/lib/Target/Mips/ |
| MipsCondMov.td | 195 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>;
199 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>;
219 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>;
230 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32, SLT, SLTu, SLTi, SLTiu>;
235 defm : MovzPats0<GPR32, FGR64, MOVZ_I_D64, SLT, SLTu, SLTi, SLTiu>;
|
| MicroMipsInstrInfo.td | 9 def SLTiu_MM : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>,
|
| Mips16InstrInfo.td | 397 // op2 can be cmpi or slti/sltiu
609 def BteqzT8SltiuX16: FEXT_T8I8I16_ins<"bteqz", "sltiu">,
631 def BtnezT8SltiuX16: FEXT_T8I8I16_ins<"btnez", "sltiu">,
1006 // Purpose: b = Sltiu rl, imm.
1010 def SelTBteqZSltiu: SeliT<"bteqz", "sltiu">;
1065 def SelTBtneZSltiu: SeliT<"btnez", "sltiu">;
1110 // Format: SLTIU rx, immediate MIPS16e
1115 def SltiuRxImm16: FRI16R_ins<0b01011, "sltiu", IIAlu> {
1125 def SltiuRxImmX16: FEXT_RI16R_ins<0b01011, "sltiu", IIAlu> {
1129 // Format: SLTIU rx, immediate MIPS16
[all...] |
| MipsInstrInfo.td | 343 // e.g. addiu, sltiu
[all...] |
| /frameworks/native/opengl/libagl/arch-mips/ |
| fixed_asm.S | 45 sltiu $t3,$t1,32 /* t3=1 if t1<32, else t3=0. t1>=32 means the float value is too small. */
|
| /external/llvm/test/MC/Mips/ |
| micromips-alu-instructions.s | 21 # CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0xb0]
50 sltiu $3, $3, 103
|
| mips-alu-instructions.s | 26 # CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0x2c]
57 sltiu $3, $3, 103
|
| mips64-alu-instructions.s | 24 # CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0x2c]
52 sltiu $3, $3, 103
|
| /dalvik/vm/arch/mips/ |
| CallO32.S | 248 sltiu $t2,$s2,3 /* set t2 if return type is float or double */
257 sltiu $t3,$s2,2 /* set t3 if return type is float */
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.c | [all...] |
| MIPS32int.stdout.exp | [all...] |
| MIPS32int.stdout.exp-BE | [all...] |
| MIPS32int.stdout.exp-mips32 | [all...] |
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 320 case SLTIU:
|
| /external/v8/src/mips/ |
| constants-mips.cc | 314 case SLTIU:
|
| /system/core/libcutils/tests/memset_mips/ |
| memset_cmips.S | 109 sltiu v1,a2,160
|
| /art/runtime/ |
| disassembler_mips.cc | 125 { kITypeMask, 11 << kOpcodeShift, "sltiu", "TSi", },
|
| /bionic/libc/arch-mips/string/ |
| memset.S | 198 sltiu v1,a2,160
|
