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      1 /****************************************************************************
      2  ****************************************************************************
      3  ***
      4  ***   This header was automatically generated from a Linux kernel header
      5  ***   of the same name, to make information necessary for userspace to
      6  ***   call into the kernel available to libc.  It contains only constants,
      7  ***   structures, and macros generated from the original header, and thus,
      8  ***   contains no copyrightable information.
      9  ***
     10  ***   To edit the content of this header, modify the corresponding
     11  ***   source file (e.g. under external/kernel-headers/original/) then
     12  ***   run bionic/libc/kernel/tools/update_all.py
     13  ***
     14  ***   Any manual change here will be lost the next time this script will
     15  ***   be run. You've been warned!
     16  ***
     17  ****************************************************************************
     18  ****************************************************************************/
     19 #ifndef _I386_TLBFLUSH_H
     20 #define _I386_TLBFLUSH_H
     21 #include <linux/mm.h>
     22 #include <asm/processor.h>
     23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     24 #define __flush_tlb() __native_flush_tlb()
     25 #define __flush_tlb_global() __native_flush_tlb_global()
     26 #define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
     27 #define __native_flush_tlb()   do {   unsigned int tmpreg;     __asm__ __volatile__(   "movl %%cr3, %0;              \n"   "movl %0, %%cr3;  # flush TLB \n"   : "=r" (tmpreg)   :: "memory");   } while (0)
     28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     29 #define __native_flush_tlb_global()   do {   unsigned int tmpreg, cr4, cr4_orig;     __asm__ __volatile__(   "movl %%cr4, %2;  # turn off PGE     \n"   "movl %2, %1;                        \n"   "andl %3, %1;                        \n"   "movl %1, %%cr4;                     \n"   "movl %%cr3, %0;                     \n"   "movl %0, %%cr3;  # flush TLB        \n"   "movl %2, %%cr4;  # turn PGE back on \n"   : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig)   : "i" (~X86_CR4_PGE)   : "memory");   } while (0)
     30 #define __native_flush_tlb_single(addr)   __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
     31 #define __flush_tlb_all()   do {   if (cpu_has_pge)   __flush_tlb_global();   else   __flush_tlb();   } while (0)
     32 #define cpu_has_invlpg (boot_cpu_data.x86 > 3)
     33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     34 #define __flush_tlb_one(addr)   do {   if (cpu_has_invlpg)   __flush_tlb_single(addr);   else   __flush_tlb();   } while (0)
     35 #define TLB_FLUSH_ALL 0xffffffff
     36 #include <linux/sched.h>
     37 #define flush_tlb() __flush_tlb()
     38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     39 #define flush_tlb_all() __flush_tlb_all()
     40 #define local_flush_tlb() __flush_tlb()
     41 #define flush_tlb_others(mask, mm, va)   native_flush_tlb_others(&mask, mm, va)
     42 #endif
     43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
     44