1 // REQUIRES: aarch64-registered-target 2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \ 3 // RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s 4 5 // Test new aarch64 intrinsics and types 6 7 #include <arm_neon.h> 8 9 int8x8_t test_vadd_s8(int8x8_t v1, int8x8_t v2) { 10 // CHECK: test_vadd_s8 11 return vadd_s8(v1, v2); 12 // CHECK: add {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 13 } 14 15 int16x4_t test_vadd_s16(int16x4_t v1, int16x4_t v2) { 16 // CHECK: test_vadd_s16 17 return vadd_s16(v1, v2); 18 // CHECK: add {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 19 } 20 21 int32x2_t test_vadd_s32(int32x2_t v1, int32x2_t v2) { 22 // CHECK: test_vadd_s32 23 return vadd_s32(v1, v2); 24 // CHECK: add {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 25 } 26 27 int64x1_t test_vadd_s64(int64x1_t v1, int64x1_t v2) { 28 // CHECK: test_vadd_s64 29 return vadd_s64(v1, v2); 30 // CHECK: add {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 31 } 32 33 float32x2_t test_vadd_f32(float32x2_t v1, float32x2_t v2) { 34 // CHECK: test_vadd_f32 35 return vadd_f32(v1, v2); 36 // CHECK: fadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 37 } 38 39 uint8x8_t test_vadd_u8(uint8x8_t v1, uint8x8_t v2) { 40 // CHECK: test_vadd_u8 41 return vadd_u8(v1, v2); 42 // CHECK: add {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 43 } 44 45 uint16x4_t test_vadd_u16(uint16x4_t v1, uint16x4_t v2) { 46 // CHECK: test_vadd_u16 47 return vadd_u16(v1, v2); 48 // CHECK: add {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 49 } 50 51 uint32x2_t test_vadd_u32(uint32x2_t v1, uint32x2_t v2) { 52 // CHECK: test_vadd_u32 53 return vadd_u32(v1, v2); 54 // CHECK: add {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 55 } 56 57 uint64x1_t test_vadd_u64(uint64x1_t v1, uint64x1_t v2) { 58 // CHECK: test_vadd_u64 59 return vadd_u64(v1, v2); 60 // CHECK: add {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 61 } 62 63 int8x16_t test_vaddq_s8(int8x16_t v1, int8x16_t v2) { 64 // CHECK: test_vaddq_s8 65 return vaddq_s8(v1, v2); 66 // CHECK: add {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 67 } 68 69 int16x8_t test_vaddq_s16(int16x8_t v1, int16x8_t v2) { 70 // CHECK: test_vaddq_s16 71 return vaddq_s16(v1, v2); 72 // CHECK: add {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 73 } 74 75 int32x4_t test_vaddq_s32(int32x4_t v1,int32x4_t v2) { 76 // CHECK: test_vaddq_s32 77 return vaddq_s32(v1, v2); 78 // CHECK: add {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 79 } 80 81 int64x2_t test_vaddq_s64(int64x2_t v1, int64x2_t v2) { 82 // CHECK: test_vaddq_s64 83 return vaddq_s64(v1, v2); 84 // CHECK: add {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 85 } 86 87 float32x4_t test_vaddq_f32(float32x4_t v1, float32x4_t v2) { 88 // CHECK: test_vaddq_f32 89 return vaddq_f32(v1, v2); 90 // CHECK: fadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 91 } 92 93 float64x2_t test_vaddq_f64(float64x2_t v1, float64x2_t v2) { 94 // CHECK: test_vaddq_f64 95 return vaddq_f64(v1, v2); 96 // CHECK: fadd {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 97 } 98 99 uint8x16_t test_vaddq_u8(uint8x16_t v1, uint8x16_t v2) { 100 // CHECK: test_vaddq_u8 101 return vaddq_u8(v1, v2); 102 // CHECK: add {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 103 } 104 105 uint16x8_t test_vaddq_u16(uint16x8_t v1, uint16x8_t v2) { 106 // CHECK: test_vaddq_u16 107 return vaddq_u16(v1, v2); 108 // CHECK: add {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 109 } 110 111 uint32x4_t test_vaddq_u32(uint32x4_t v1, uint32x4_t v2) { 112 // CHECK: vaddq_u32 113 return vaddq_u32(v1, v2); 114 // CHECK: add {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 115 } 116 117 uint64x2_t test_vaddq_u64(uint64x2_t v1, uint64x2_t v2) { 118 // CHECK: test_vaddq_u64 119 return vaddq_u64(v1, v2); 120 // CHECK: add {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 121 } 122 123 int8x8_t test_vsub_s8(int8x8_t v1, int8x8_t v2) { 124 // CHECK: test_vsub_s8 125 return vsub_s8(v1, v2); 126 // CHECK: sub {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 127 } 128 int16x4_t test_vsub_s16(int16x4_t v1, int16x4_t v2) { 129 // CHECK: test_vsub_s16 130 return vsub_s16(v1, v2); 131 // CHECK: sub {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 132 } 133 int32x2_t test_vsub_s32(int32x2_t v1, int32x2_t v2) { 134 // CHECK: test_vsub_s32 135 return vsub_s32(v1, v2); 136 // CHECK: sub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 137 } 138 139 int64x1_t test_vsub_s64(int64x1_t v1, int64x1_t v2) { 140 // CHECK: test_vsub_s64 141 return vsub_s64(v1, v2); 142 // CHECK: sub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 143 } 144 145 float32x2_t test_vsub_f32(float32x2_t v1, float32x2_t v2) { 146 // CHECK: test_vsub_f32 147 return vsub_f32(v1, v2); 148 // CHECK: fsub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 149 } 150 151 uint8x8_t test_vsub_u8(uint8x8_t v1, uint8x8_t v2) { 152 // CHECK: test_vsub_u8 153 return vsub_u8(v1, v2); 154 // CHECK: sub {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 155 } 156 157 uint16x4_t test_vsub_u16(uint16x4_t v1, uint16x4_t v2) { 158 // CHECK: test_vsub_u16 159 return vsub_u16(v1, v2); 160 // CHECK: sub {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 161 } 162 163 uint32x2_t test_vsub_u32(uint32x2_t v1, uint32x2_t v2) { 164 // CHECK: test_vsub_u32 165 return vsub_u32(v1, v2); 166 // CHECK: sub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 167 } 168 169 uint64x1_t test_vsub_u64(uint64x1_t v1, uint64x1_t v2) { 170 // CHECK: test_vsub_u64 171 return vsub_u64(v1, v2); 172 // CHECK: sub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 173 } 174 175 int8x16_t test_vsubq_s8(int8x16_t v1, int8x16_t v2) { 176 // CHECK: test_vsubq_s8 177 return vsubq_s8(v1, v2); 178 // CHECK: sub {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 179 } 180 181 int16x8_t test_vsubq_s16(int16x8_t v1, int16x8_t v2) { 182 // CHECK: test_vsubq_s16 183 return vsubq_s16(v1, v2); 184 // CHECK: sub {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 185 } 186 187 int32x4_t test_vsubq_s32(int32x4_t v1,int32x4_t v2) { 188 // CHECK: test_vsubq_s32 189 return vsubq_s32(v1, v2); 190 // CHECK: sub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 191 } 192 193 int64x2_t test_vsubq_s64(int64x2_t v1, int64x2_t v2) { 194 // CHECK: test_vsubq_s64 195 return vsubq_s64(v1, v2); 196 // CHECK: sub {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 197 } 198 199 float32x4_t test_vsubq_f32(float32x4_t v1, float32x4_t v2) { 200 // CHECK: test_vsubq_f32 201 return vsubq_f32(v1, v2); 202 // CHECK: fsub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 203 } 204 205 float64x2_t test_vsubq_f64(float64x2_t v1, float64x2_t v2) { 206 // CHECK: test_vsubq_f64 207 return vsubq_f64(v1, v2); 208 // CHECK: fsub {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 209 } 210 211 uint8x16_t test_vsubq_u8(uint8x16_t v1, uint8x16_t v2) { 212 // CHECK: test_vsubq_u8 213 return vsubq_u8(v1, v2); 214 // CHECK: sub {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 215 } 216 217 uint16x8_t test_vsubq_u16(uint16x8_t v1, uint16x8_t v2) { 218 // CHECK: test_vsubq_u16 219 return vsubq_u16(v1, v2); 220 // CHECK: sub {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 221 } 222 223 uint32x4_t test_vsubq_u32(uint32x4_t v1, uint32x4_t v2) { 224 // CHECK: vsubq_u32 225 return vsubq_u32(v1, v2); 226 // CHECK: sub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 227 } 228 229 uint64x2_t test_vsubq_u64(uint64x2_t v1, uint64x2_t v2) { 230 // CHECK: test_vsubq_u64 231 return vsubq_u64(v1, v2); 232 // CHECK: sub {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 233 } 234 235 int8x8_t test_vmul_s8(int8x8_t v1, int8x8_t v2) { 236 // CHECK: test_vmul_s8 237 return vmul_s8(v1, v2); 238 // CHECK: mul {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 239 } 240 241 int16x4_t test_vmul_s16(int16x4_t v1, int16x4_t v2) { 242 // CHECK: test_vmul_s16 243 return vmul_s16(v1, v2); 244 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 245 } 246 247 int32x2_t test_vmul_s32(int32x2_t v1, int32x2_t v2) { 248 // CHECK: test_vmul_s32 249 return vmul_s32(v1, v2); 250 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 251 } 252 253 float32x2_t test_vmul_f32(float32x2_t v1, float32x2_t v2) { 254 // CHECK: test_vmul_f32 255 return vmul_f32(v1, v2); 256 // CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 257 } 258 259 260 uint8x8_t test_vmul_u8(uint8x8_t v1, uint8x8_t v2) { 261 // CHECK: test_vmul_u8 262 return vmul_u8(v1, v2); 263 // CHECK: mul {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 264 } 265 266 uint16x4_t test_vmul_u16(uint16x4_t v1, uint16x4_t v2) { 267 // CHECK: test_vmul_u16 268 return vmul_u16(v1, v2); 269 // CHECK: mul {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 270 } 271 272 uint32x2_t test_vmul_u32(uint32x2_t v1, uint32x2_t v2) { 273 // CHECK: test_vmul_u32 274 return vmul_u32(v1, v2); 275 // CHECK: mul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 276 } 277 278 int8x16_t test_vmulq_s8(int8x16_t v1, int8x16_t v2) { 279 // CHECK: test_vmulq_s8 280 return vmulq_s8(v1, v2); 281 // CHECK: mul {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 282 } 283 284 int16x8_t test_vmulq_s16(int16x8_t v1, int16x8_t v2) { 285 // CHECK: test_vmulq_s16 286 return vmulq_s16(v1, v2); 287 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 288 } 289 290 int32x4_t test_vmulq_s32(int32x4_t v1, int32x4_t v2) { 291 // CHECK: test_vmulq_s32 292 return vmulq_s32(v1, v2); 293 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 294 } 295 296 uint8x16_t test_vmulq_u8(uint8x16_t v1, uint8x16_t v2) { 297 // CHECK: test_vmulq_u8 298 return vmulq_u8(v1, v2); 299 // CHECK: mul {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 300 } 301 302 uint16x8_t test_vmulq_u16(uint16x8_t v1, uint16x8_t v2) { 303 // CHECK: test_vmulq_u16 304 return vmulq_u16(v1, v2); 305 // CHECK: mul {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 306 } 307 308 uint32x4_t test_vmulq_u32(uint32x4_t v1, uint32x4_t v2) { 309 // CHECK: test_vmulq_u32 310 return vmulq_u32(v1, v2); 311 // CHECK: mul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 312 } 313 314 float32x4_t test_vmulq_f32(float32x4_t v1, float32x4_t v2) { 315 // CHECK: test_vmulq_f32 316 return vmulq_f32(v1, v2); 317 // CHECK: fmul {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 318 } 319 320 float64x2_t test_vmulq_f64(float64x2_t v1, float64x2_t v2) { 321 // CHECK: test_vmulq_f64 322 return vmulq_f64(v1, v2); 323 // CHECK: fmul {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 324 } 325 326 poly8x8_t test_vmul_p8(poly8x8_t v1, poly8x8_t v2) { 327 // test_vmul_p8 328 return vmul_p8(v1, v2); 329 // pmul {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 330 } 331 332 poly8x16_t test_vmulq_p8(poly8x16_t v1, poly8x16_t v2) { 333 // test_vmulq_p8 334 return vmulq_p8(v1, v2); 335 // pmul {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 336 } 337 338 339 int8x8_t test_vmla_s8(int8x8_t v1, int8x8_t v2, int8x8_t v3) { 340 // CHECK: test_vmla_s8 341 return vmla_s8(v1, v2, v3); 342 // CHECK: mla {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 343 } 344 345 int8x8_t test_vmla_s16(int16x4_t v1, int16x4_t v2, int16x4_t v3) { 346 // CHECK: test_vmla_s16 347 return vmla_s16(v1, v2, v3); 348 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 349 } 350 351 int32x2_t test_vmla_s32(int32x2_t v1, int32x2_t v2, int32x2_t v3) { 352 // CHECK: test_vmla_s32 353 return vmla_s32(v1, v2, v3); 354 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 355 } 356 357 float32x2_t test_vmla_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) { 358 // CHECK: test_vmla_f32 359 return vmla_f32(v1, v2, v3); 360 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 361 } 362 363 uint8x8_t test_vmla_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) { 364 // CHECK: test_vmla_u8 365 return vmla_u8(v1, v2, v3); 366 // CHECK: mla {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 367 } 368 369 uint16x4_t test_vmla_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) { 370 // CHECK: test_vmla_u16 371 return vmla_u16(v1, v2, v3); 372 // CHECK: mla {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 373 } 374 375 uint32x2_t test_vmla_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) { 376 // CHECK: test_vmla_u32 377 return vmla_u32(v1, v2, v3); 378 // CHECK: mla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 379 } 380 381 int8x16_t test_vmlaq_s8(int8x16_t v1, int8x16_t v2, int8x16_t v3) { 382 // CHECK: test_vmlaq_s8 383 return vmlaq_s8(v1, v2, v3); 384 // CHECK: mla {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 385 } 386 387 int16x8_t test_vmlaq_s16(int16x8_t v1, int16x8_t v2, int16x8_t v3) { 388 // CHECK: test_vmlaq_s16 389 return vmlaq_s16(v1, v2, v3); 390 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 391 } 392 393 int32x4_t test_vmlaq_s32(int32x4_t v1, int32x4_t v2, int32x4_t v3) { 394 // CHECK: test_vmlaq_s32 395 return vmlaq_s32(v1, v2, v3); 396 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 397 } 398 399 float32x4_t test_vmlaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) { 400 // CHECK: test_vmlaq_f32 401 return vmlaq_f32(v1, v2, v3); 402 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 403 } 404 405 uint8x16_t test_vmlaq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) { 406 // CHECK: test_vmlaq_u8 407 return vmlaq_u8(v1, v2, v3); 408 // CHECK: mla {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 409 } 410 411 uint16x8_t test_vmlaq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) { 412 // CHECK: test_vmlaq_u16 413 return vmlaq_u16(v1, v2, v3); 414 // CHECK: mla {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 415 } 416 417 uint32x4_t test_vmlaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { 418 // CHECK: test_vmlaq_u32 419 return vmlaq_u32(v1, v2, v3); 420 // CHECK: mla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 421 } 422 423 float64x2_t test_vmlaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) { 424 // CHECK: test_vmlaq_f64 425 return vmlaq_f64(v1, v2, v3); 426 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 427 } 428 429 int8x8_t test_vmls_s8(int8x8_t v1, int8x8_t v2, int8x8_t v3) { 430 // CHECK: test_vmls_s8 431 return vmls_s8(v1, v2, v3); 432 // CHECK: mls {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 433 } 434 435 int8x8_t test_vmls_s16(int16x4_t v1, int16x4_t v2, int16x4_t v3) { 436 // CHECK: test_vmls_s16 437 return vmls_s16(v1, v2, v3); 438 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 439 } 440 441 int32x2_t test_vmls_s32(int32x2_t v1, int32x2_t v2, int32x2_t v3) { 442 // CHECK: test_vmls_s32 443 return vmls_s32(v1, v2, v3); 444 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 445 } 446 447 float32x2_t test_vmls_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) { 448 // CHECK: test_vmls_f32 449 return vmls_f32(v1, v2, v3); 450 // CHECK: fmls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 451 } 452 453 uint8x8_t test_vmls_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) { 454 // CHECK: test_vmls_u8 455 return vmls_u8(v1, v2, v3); 456 // CHECK: mls {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 457 } 458 459 uint16x4_t test_vmls_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) { 460 // CHECK: test_vmls_u16 461 return vmls_u16(v1, v2, v3); 462 // CHECK: mls {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 463 } 464 465 uint32x2_t test_vmls_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) { 466 // CHECK: test_vmls_u32 467 return vmls_u32(v1, v2, v3); 468 // CHECK: mls {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 469 } 470 int8x16_t test_vmlsq_s8(int8x16_t v1, int8x16_t v2, int8x16_t v3) { 471 // CHECK: test_vmlsq_s8 472 return vmlsq_s8(v1, v2, v3); 473 // CHECK: mls {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 474 } 475 476 int16x8_t test_vmlsq_s16(int16x8_t v1, int16x8_t v2, int16x8_t v3) { 477 // CHECK: test_vmlsq_s16 478 return vmlsq_s16(v1, v2, v3); 479 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 480 } 481 482 int32x4_t test_vmlsq_s32(int32x4_t v1, int32x4_t v2, int32x4_t v3) { 483 // CHECK: test_vmlsq_s32 484 return vmlsq_s32(v1, v2, v3); 485 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 486 } 487 488 float32x4_t test_vmlsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) { 489 // CHECK: test_vmlsq_f32 490 return vmlsq_f32(v1, v2, v3); 491 // CHECK: fmls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 492 } 493 uint8x16_t test_vmlsq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) { 494 // CHECK: test_vmlsq_u8 495 return vmlsq_u8(v1, v2, v3); 496 // CHECK: mls {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 497 } 498 499 uint16x8_t test_vmlsq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) { 500 // CHECK: test_vmlsq_u16 501 return vmlsq_u16(v1, v2, v3); 502 // CHECK: mls {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 503 } 504 505 uint32x4_t test_vmlsq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { 506 // CHECK: test_vmlsq_u32 507 return vmlsq_u32(v1, v2, v3); 508 // CHECK: mls {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 509 } 510 511 float64x2_t test_vmlsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) { 512 // CHECK: test_vmlsq_f64 513 return vmlsq_f64(v1, v2, v3); 514 // CHECK: fmls {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 515 } 516 float32x2_t test_vfma_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) { 517 // CHECK: test_vfma_f32 518 return vfma_f32(v1, v2, v3); 519 // CHECK: fmla {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 520 } 521 522 float32x4_t test_vfmaq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) { 523 // CHECK: test_vfmaq_f32 524 return vfmaq_f32(v1, v2, v3); 525 // CHECK: fmla {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 526 } 527 528 float64x2_t test_vfmaq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) { 529 // CHECK: test_vfmaq_f64 530 return vfmaq_f64(v1, v2, v3); 531 // CHECK: fmla {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 532 } 533 float32x2_t test_vfms_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) { 534 // CHECK: test_vfms_f32 535 return vfms_f32(v1, v2, v3); 536 // CHECK: fmls v0.2s, v1.2s, v2.2s 537 } 538 539 float32x4_t test_vfmsq_f32(float32x4_t v1, float32x4_t v2, float32x4_t v3) { 540 // CHECK: test_vfmsq_f32 541 return vfmsq_f32(v1, v2, v3); 542 // CHECK: fmls v0.4s, v1.4s, v2.4s 543 } 544 545 float64x2_t test_vfmsq_f64(float64x2_t v1, float64x2_t v2, float64x2_t v3) { 546 // CHECK: vfmsq_f64 547 return vfmsq_f64(v1, v2, v3); 548 // CHECK: fmls v0.2d, v1.2d, v2.2d 549 } 550 551 float64x2_t test_vdivq_f64(float64x2_t v1, float64x2_t v2) { 552 // CHECK: test_vdivq_f64 553 return vdivq_f64(v1, v2); 554 // CHECK: fdiv {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 555 } 556 557 float32x4_t test_vdivq_f32(float32x4_t v1, float32x4_t v2) { 558 // CHECK: test_vdivq_f32 559 return vdivq_f32(v1, v2); 560 // CHECK: fdiv {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 561 } 562 563 float32x2_t test_vdiv_f32(float32x2_t v1, float32x2_t v2) { 564 // CHECK: test_vdiv_f32 565 return vdiv_f32(v1, v2); 566 // CHECK: fdiv {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 567 } 568 569 uint64x1_t test_vaddd_u64(uint64x1_t v1, uint64x1_t v2) { 570 // CHECK: test_vaddd_u64 571 return vaddd_u64(v1, v2); 572 // CHECK: add {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 573 } 574 575 int64x1_t test_vaddd_s64(int64x1_t v1, int64x1_t v2) { 576 // CHECK: test_vaddd_s64 577 return vaddd_s64(v1, v2); 578 // CHECK: add {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 579 } 580 581 uint64x1_t test_vsubd_u64(uint64x1_t v1, uint64x1_t v2) { 582 // CHECK: test_vsubd_u64 583 return vsubd_u64(v1, v2); 584 // CHECK: sub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 585 } 586 587 int64x1_t test_vsubd_s64(int64x1_t v1, int64x1_t v2) { 588 // CHECK: test_vsubd_s64 589 return vsubd_s64(v1, v2); 590 // CHECK: sub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 591 } 592 593 int8x8_t test_vaba_s8(int8x8_t v1, int8x8_t v2, int8x8_t v3) { 594 // CHECK: test_vaba_s8 595 return vaba_s8(v1, v2, v3); 596 // CHECK: saba {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 597 } 598 599 int16x4_t test_vaba_s16(int16x4_t v1, int16x4_t v2, int16x4_t v3) { 600 // CHECK: test_vaba_s16 601 return vaba_s16(v1, v2, v3); 602 // CHECK: saba {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 603 } 604 605 int32x2_t test_vaba_s32(int32x2_t v1, int32x2_t v2, int32x2_t v3) { 606 // CHECK: test_vaba_s32 607 return vaba_s32(v1, v2, v3); 608 // CHECK: saba {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 609 } 610 611 uint8x8_t test_vaba_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) { 612 // CHECK: test_vaba_u8 613 return vaba_u8(v1, v2, v3); 614 // CHECK: uaba {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 615 } 616 617 uint16x4_t test_vaba_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) { 618 // CHECK: test_vaba_u16 619 return vaba_u16(v1, v2, v3); 620 // CHECK: uaba {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 621 } 622 623 uint32x2_t test_vaba_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) { 624 // CHECK: test_vaba_u32 625 return vaba_u32(v1, v2, v3); 626 // CHECK: uaba {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 627 } 628 629 int8x16_t test_vabaq_s8(int8x16_t v1, int8x16_t v2, int8x16_t v3) { 630 // CHECK: test_vabaq_s8 631 return vabaq_s8(v1, v2, v3); 632 // CHECK: saba {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 633 } 634 635 int16x8_t test_vabaq_s16(int16x8_t v1, int16x8_t v2, int16x8_t v3) { 636 // CHECK: test_vabaq_s16 637 return vabaq_s16(v1, v2, v3); 638 // CHECK: saba {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 639 } 640 641 int32x4_t test_vabaq_s32(int32x4_t v1, int32x4_t v2, int32x4_t v3) { 642 // CHECK: test_vabaq_s32 643 return vabaq_s32(v1, v2, v3); 644 // CHECK: saba {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 645 } 646 647 uint8x16_t test_vabaq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) { 648 // CHECK: test_vabaq_u8 649 return vabaq_u8(v1, v2, v3); 650 // CHECK: uaba {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 651 } 652 653 uint16x8_t test_vabaq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) { 654 // CHECK: test_vabaq_u16 655 return vabaq_u16(v1, v2, v3); 656 // CHECK: uaba {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 657 } 658 659 uint32x4_t test_vabaq_u32(uint32x4_t v1, uint32x4_t v2, uint32x4_t v3) { 660 // CHECK: test_vabaq_u32 661 return vabaq_u32(v1, v2, v3); 662 // CHECK: uaba {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 663 } 664 665 int8x8_t test_vabd_s8(int8x8_t v1, int8x8_t v2) { 666 // CHECK: test_vabd_s8 667 return vabd_s8(v1, v2); 668 // CHECK: sabd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 669 } 670 671 int16x4_t test_vabd_s16(int16x4_t v1, int16x4_t v2) { 672 // CHECK: test_vabd_s16 673 return vabd_s16(v1, v2); 674 // CHECK: sabd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 675 } 676 677 int32x2_t test_vabd_s32(int32x2_t v1, int32x2_t v2) { 678 // CHECK: test_vabd_s32 679 return vabd_s32(v1, v2); 680 // CHECK: sabd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 681 } 682 683 uint8x8_t test_vabd_u8(uint8x8_t v1, uint8x8_t v2) { 684 // CHECK: test_vabd_u8 685 return vabd_u8(v1, v2); 686 // CHECK: uabd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 687 } 688 689 uint16x4_t test_vabd_u16(uint16x4_t v1, uint16x4_t v2) { 690 // CHECK: test_vabd_u16 691 return vabd_u16(v1, v2); 692 // CHECK: uabd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 693 } 694 695 uint32x2_t test_vabd_u32(uint32x2_t v1, uint32x2_t v2) { 696 // CHECK: test_vabd_u32 697 return vabd_u32(v1, v2); 698 // CHECK: uabd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 699 } 700 701 float32x2_t test_vabd_f32(float32x2_t v1, float32x2_t v2) { 702 // CHECK: test_vabd_f32 703 return vabd_f32(v1, v2); 704 // CHECK: fabd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 705 } 706 707 int8x16_t test_vabdq_s8(int8x16_t v1, int8x16_t v2) { 708 // CHECK: test_vabdq_s8 709 return vabdq_s8(v1, v2); 710 // CHECK: sabd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 711 } 712 713 int16x8_t test_vabdq_s16(int16x8_t v1, int16x8_t v2) { 714 // CHECK: test_vabdq_s16 715 return vabdq_s16(v1, v2); 716 // CHECK: sabd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 717 } 718 719 int32x4_t test_vabdq_s32(int32x4_t v1, int32x4_t v2) { 720 // CHECK: test_vabdq_s32 721 return vabdq_s32(v1, v2); 722 // CHECK: sabd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 723 } 724 725 uint8x16_t test_vabdq_u8(uint8x16_t v1, uint8x16_t v2) { 726 // CHECK: test_vabdq_u8 727 return vabdq_u8(v1, v2); 728 // CHECK: uabd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 729 } 730 731 uint16x8_t test_vabdq_u16(uint16x8_t v1, uint16x8_t v2) { 732 // CHECK: test_vabdq_u16 733 return vabdq_u16(v1, v2); 734 // CHECK: uabd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 735 } 736 737 uint32x4_t test_vabdq_u32(uint32x4_t v1, uint32x4_t v2) { 738 // CHECK: test_vabdq_u32 739 return vabdq_u32(v1, v2); 740 // CHECK: uabd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 741 } 742 743 float32x4_t test_vabdq_f32(float32x4_t v1, float32x4_t v2) { 744 // CHECK: test_vabdq_f32 745 return vabdq_f32(v1, v2); 746 // CHECK: fabd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 747 } 748 749 float64x2_t test_vabdq_f64(float64x2_t v1, float64x2_t v2) { 750 // CHECK: test_vabdq_f64 751 return vabdq_f64(v1, v2); 752 // CHECK: fabd {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 753 } 754 755 756 int8x8_t test_vbsl_s8(uint8x8_t v1, int8x8_t v2, int8x8_t v3) { 757 // CHECK: test_vbsl_s8 758 return vbsl_s8(v1, v2, v3); 759 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 760 } 761 762 int8x8_t test_vbsl_s16(uint16x4_t v1, int16x4_t v2, int16x4_t v3) { 763 // CHECK: test_vbsl_s16 764 return vbsl_s16(v1, v2, v3); 765 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 766 } 767 768 int32x2_t test_vbsl_s32(uint32x2_t v1, int32x2_t v2, int32x2_t v3) { 769 // CHECK: test_vbsl_s32 770 return vbsl_s32(v1, v2, v3); 771 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 772 } 773 774 uint64x1_t test_vbsl_s64(uint64x1_t v1, uint64x1_t v2, uint64x1_t v3) { 775 // CHECK: test_vbsl_s64 776 return vbsl_s64(v1, v2, v3); 777 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 778 } 779 780 uint8x8_t test_vbsl_u8(uint8x8_t v1, uint8x8_t v2, uint8x8_t v3) { 781 // CHECK: test_vbsl_u8 782 return vbsl_u8(v1, v2, v3); 783 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 784 } 785 786 uint16x4_t test_vbsl_u16(uint16x4_t v1, uint16x4_t v2, uint16x4_t v3) { 787 // CHECK: test_vbsl_u16 788 return vbsl_u16(v1, v2, v3); 789 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 790 } 791 792 uint32x2_t test_vbsl_u32(uint32x2_t v1, uint32x2_t v2, uint32x2_t v3) { 793 // CHECK: test_vbsl_u32 794 return vbsl_u32(v1, v2, v3); 795 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 796 } 797 798 uint64x1_t test_vbsl_u64(uint64x1_t v1, uint64x1_t v2, uint64x1_t v3) { 799 // CHECK: test_vbsl_u64 800 return vbsl_u64(v1, v2, v3); 801 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 802 } 803 804 float32x2_t test_vbsl_f32(float32x2_t v1, float32x2_t v2, float32x2_t v3) { 805 // CHECK: test_vbsl_f32 806 return vbsl_f32(v1, v2, v3); 807 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 808 } 809 810 poly8x8_t test_vbsl_p8(uint8x8_t v1, poly8x8_t v2, poly8x8_t v3) { 811 // CHECK: test_vbsl_p8 812 return vbsl_p8(v1, v2, v3); 813 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 814 } 815 816 poly16x4_t test_vbsl_p16(uint16x4_t v1, poly16x4_t v2, poly16x4_t v3) { 817 // CHECK: test_vbsl_p16 818 return vbsl_p16(v1, v2, v3); 819 // CHECK: bsl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 820 } 821 822 int8x16_t test_vbslq_s8(uint8x16_t v1, int8x16_t v2, int8x16_t v3) { 823 // CHECK: test_vbslq_s8 824 return vbslq_s8(v1, v2, v3); 825 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 826 } 827 828 int16x8_t test_vbslq_s16(uint16x8_t v1, int16x8_t v2, int16x8_t v3) { 829 // CHECK: test_vbslq_s16 830 return vbslq_s16(v1, v2, v3); 831 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 832 } 833 834 int32x4_t test_vbslq_s32(uint32x4_t v1, int32x4_t v2, int32x4_t v3) { 835 // CHECK: test_vbslq_s32 836 return vbslq_s32(v1, v2, v3); 837 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 838 } 839 840 int64x2_t test_vbslq_s64(uint64x2_t v1, int64x2_t v2, int64x2_t v3) { 841 // CHECK: test_vbslq_s64 842 return vbslq_s64(v1, v2, v3); 843 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 844 } 845 846 uint8x16_t test_vbslq_u8(uint8x16_t v1, uint8x16_t v2, uint8x16_t v3) { 847 // CHECK: test_vbslq_u8 848 return vbslq_u8(v1, v2, v3); 849 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 850 } 851 852 uint16x8_t test_vbslq_u16(uint16x8_t v1, uint16x8_t v2, uint16x8_t v3) { 853 // CHECK: test_vbslq_u16 854 return vbslq_u16(v1, v2, v3); 855 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 856 } 857 858 int32x4_t test_vbslq_u32(uint32x4_t v1, int32x4_t v2, int32x4_t v3) { 859 // CHECK: test_vbslq_u32 860 return vbslq_s32(v1, v2, v3); 861 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 862 } 863 864 uint64x2_t test_vbslq_u64(uint64x2_t v1, uint64x2_t v2, uint64x2_t v3) { 865 // CHECK: test_vbslq_u64 866 return vbslq_u64(v1, v2, v3); 867 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 868 } 869 870 float32x4_t test_vbslq_f32(uint32x4_t v1, float32x4_t v2, float32x4_t v3) { 871 // CHECK: test_vbslq_f32 872 return vbslq_f32(v1, v2, v3); 873 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 874 } 875 876 poly8x16_t test_vbslq_p8(uint8x16_t v1, poly8x16_t v2, poly8x16_t v3) { 877 // CHECK: test_vbslq_p8 878 return vbslq_p8(v1, v2, v3); 879 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 880 } 881 882 poly16x8_t test_vbslq_p16(uint16x8_t v1, poly16x8_t v2, poly16x8_t v3) { 883 // CHECK: test_vbslq_p16 884 return vbslq_p16(v1, v2, v3); 885 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 886 } 887 888 float64x2_t test_vbslq_f64(uint64x2_t v1, float64x2_t v2, float64x2_t v3) { 889 // CHECK: test_vbslq_f64 890 return vbslq_f64(v1, v2, v3); 891 // CHECK: bsl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 892 } 893 894 float32x2_t test_vrecps_f32(float32x2_t v1, float32x2_t v2) { 895 // CHECK: test_vrecps_f32 896 return vrecps_f32(v1, v2); 897 // CHECK: frecps {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 898 } 899 900 float32x4_t test_vrecpsq_f32(float32x4_t v1, float32x4_t v2) { 901 // CHECK: test_vrecpsq_f32 902 return vrecpsq_f32(v1, v2); 903 // CHECK: frecps {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 904 } 905 906 float64x2_t test_vrecpsq_f64(float64x2_t v1, float64x2_t v2) { 907 // CHECK: test_vrecpsq_f64 908 return vrecpsq_f64(v1, v2); 909 // CHECK: frecps {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 910 } 911 912 float32x2_t test_vrsqrts_f32(float32x2_t v1, float32x2_t v2) { 913 // CHECK: test_vrsqrts_f32 914 return vrsqrts_f32(v1, v2); 915 // CHECK: frsqrts {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 916 } 917 918 float32x4_t test_vrsqrtsq_f32(float32x4_t v1, float32x4_t v2) { 919 // CHECK: test_vrsqrtsq_f32 920 return vrsqrtsq_f32(v1, v2); 921 // CHECK: frsqrts {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 922 } 923 924 float64x2_t test_vrsqrtsq_f64(float64x2_t v1, float64x2_t v2) { 925 // CHECK: test_vrsqrtsq_f64 926 return vrsqrtsq_f64(v1, v2); 927 // CHECK: frsqrts {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 928 } 929 930 uint32x2_t test_vcage_f32(float32x2_t v1, float32x2_t v2) { 931 // CHECK: test_vcage_f32 932 return vcage_f32(v1, v2); 933 // CHECK: facge {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 934 } 935 936 uint32x4_t test_vcageq_f32(float32x4_t v1, float32x4_t v2) { 937 // CHECK: test_vcageq_f32 938 return vcageq_f32(v1, v2); 939 // CHECK: facge {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 940 } 941 942 uint64x2_t test_vcageq_f64(float64x2_t v1, float64x2_t v2) { 943 // CHECK: test_vcageq_f64 944 return vcageq_f64(v1, v2); 945 // CHECK: facge {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 946 } 947 948 uint32x2_t test_vcagt_f32(float32x2_t v1, float32x2_t v2) { 949 // CHECK: test_vcagt_f32 950 return vcagt_f32(v1, v2); 951 // CHECK: facgt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 952 } 953 954 uint32x4_t test_vcagtq_f32(float32x4_t v1, float32x4_t v2) { 955 // CHECK: test_vcagtq_f32 956 return vcagtq_f32(v1, v2); 957 // CHECK: facgt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 958 } 959 960 uint64x2_t test_vcagtq_f64(float64x2_t v1, float64x2_t v2) { 961 // CHECK: test_vcagtq_f64 962 return vcagtq_f64(v1, v2); 963 // CHECK: facgt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 964 } 965 966 uint32x2_t test_vcale_f32(float32x2_t v1, float32x2_t v2) { 967 // CHECK: test_vcale_f32 968 return vcale_f32(v1, v2); 969 // Using registers other than v0, v1 are possible, but would be odd. 970 // CHECK: facge {{v[0-9]+}}.2s, v1.2s, v0.2s 971 } 972 973 uint32x4_t test_vcaleq_f32(float32x4_t v1, float32x4_t v2) { 974 // CHECK: test_vcaleq_f32 975 return vcaleq_f32(v1, v2); 976 // Using registers other than v0, v1 are possible, but would be odd. 977 // CHECK: facge {{v[0-9]+}}.4s, v1.4s, v0.4s 978 } 979 980 uint64x2_t test_vcaleq_f64(float64x2_t v1, float64x2_t v2) { 981 // CHECK: test_vcaleq_f64 982 return vcaleq_f64(v1, v2); 983 // Using registers other than v0, v1 are possible, but would be odd. 984 // CHECK: facge {{v[0-9]+}}.2d, v1.2d, v0.2d 985 } 986 987 uint32x2_t test_vcalt_f32(float32x2_t v1, float32x2_t v2) { 988 // CHECK: test_vcalt_f32 989 return vcalt_f32(v1, v2); 990 // Using registers other than v0, v1 are possible, but would be odd. 991 // CHECK: facgt {{v[0-9]+}}.2s, v1.2s, v0.2s 992 } 993 994 uint32x4_t test_vcaltq_f32(float32x4_t v1, float32x4_t v2) { 995 // CHECK: test_vcaltq_f32 996 return vcaltq_f32(v1, v2); 997 // Using registers other than v0, v1 are possible, but would be odd. 998 // CHECK: facgt {{v[0-9]+}}.4s, v1.4s, v0.4s 999 } 1000 1001 uint64x2_t test_vcaltq_f64(float64x2_t v1, float64x2_t v2) { 1002 // CHECK: test_vcaltq_f64 1003 return vcaltq_f64(v1, v2); 1004 // Using registers other than v0, v1 are possible, but would be odd. 1005 // CHECK: facgt {{v[0-9]+}}.2d, v1.2d, v0.2d 1006 } 1007 1008 uint8x8_t test_vtst_s8(int8x8_t v1, int8x8_t v2) { 1009 // CHECK: test_vtst_s8 1010 return vtst_s8(v1, v2); 1011 // CHECK: cmtst {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1012 } 1013 1014 uint16x4_t test_vtst_s16(int16x4_t v1, int16x4_t v2) { 1015 // CHECK: test_vtst_s16 1016 return vtst_s16(v1, v2); 1017 // CHECK: cmtst {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1018 } 1019 1020 uint32x2_t test_vtst_s32(int32x2_t v1, int32x2_t v2) { 1021 // CHECK: test_vtst_s32 1022 return vtst_s32(v1, v2); 1023 // CHECK: cmtst {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1024 } 1025 1026 uint8x8_t test_vtst_u8(uint8x8_t v1, uint8x8_t v2) { 1027 // CHECK: test_vtst_u8 1028 return vtst_u8(v1, v2); 1029 // CHECK: cmtst {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1030 } 1031 1032 uint16x4_t test_vtst_u16(uint16x4_t v1, uint16x4_t v2) { 1033 // CHECK: test_vtst_u16 1034 return vtst_u16(v1, v2); 1035 // CHECK: cmtst {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1036 } 1037 1038 uint32x2_t test_vtst_u32(uint32x2_t v1, uint32x2_t v2) { 1039 // CHECK: test_vtst_u32 1040 return vtst_u32(v1, v2); 1041 // CHECK: cmtst {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1042 } 1043 1044 uint8x16_t test_vtstq_s8(int8x16_t v1, int8x16_t v2) { 1045 // CHECK: test_vtstq_s8 1046 return vtstq_s8(v1, v2); 1047 // CHECK: cmtst {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1048 } 1049 1050 uint16x8_t test_vtstq_s16(int16x8_t v1, int16x8_t v2) { 1051 // CHECK: test_vtstq_s16 1052 return vtstq_s16(v1, v2); 1053 // CHECK: cmtst {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1054 } 1055 1056 uint32x4_t test_vtstq_s32(int32x4_t v1, int32x4_t v2) { 1057 // CHECK: test_vtstq_s32 1058 return vtstq_s32(v1, v2); 1059 // CHECK: cmtst {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1060 } 1061 1062 uint8x16_t test_vtstq_u8(uint8x16_t v1, uint8x16_t v2) { 1063 // CHECK: test_vtstq_u8 1064 return vtstq_u8(v1, v2); 1065 // CHECK: cmtst {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1066 } 1067 1068 uint16x8_t test_vtstq_u16(uint16x8_t v1, uint16x8_t v2) { 1069 // CHECK: test_vtstq_u16 1070 return vtstq_u16(v1, v2); 1071 // CHECK: cmtst {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1072 } 1073 1074 uint32x4_t test_vtstq_u32(uint32x4_t v1, uint32x4_t v2) { 1075 // CHECK: test_vtstq_u32 1076 return vtstq_u32(v1, v2); 1077 // CHECK: cmtst {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1078 } 1079 1080 uint64x2_t test_vtstq_s64(int64x2_t v1, int64x2_t v2) { 1081 // CHECK: test_vtstq_s64 1082 return vtstq_s64(v1, v2); 1083 // CHECK: cmtst {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1084 } 1085 1086 uint64x2_t test_vtstq_u64(uint64x2_t v1, uint64x2_t v2) { 1087 // CHECK: test_vtstq_u64 1088 return vtstq_u64(v1, v2); 1089 // CHECK: cmtst {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1090 } 1091 1092 uint8x8_t test_vtst_p8(poly8x8_t v1, poly8x8_t v2) { 1093 // CHECK: test_vtst_p8 1094 return vtst_p8(v1, v2); 1095 // CHECK: cmtst {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1096 } 1097 1098 uint8x16_t test_vtstq_p8(poly8x16_t v1, poly8x16_t v2) { 1099 // CHECK: test_vtstq_p8 1100 return vtstq_p8(v1, v2); 1101 // CHECK: cmtst {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1102 } 1103 1104 1105 uint8x8_t test_vceq_s8(int8x8_t v1, int8x8_t v2) { 1106 // CHECK: test_vceq_s8 1107 return vceq_s8(v1, v2); 1108 // CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1109 } 1110 1111 uint16x4_t test_vceq_s16(int16x4_t v1, int16x4_t v2) { 1112 // CHECK: test_vceq_s16 1113 return vceq_s16(v1, v2); 1114 // CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1115 } 1116 1117 uint32x2_t test_vceq_s32(int32x2_t v1, int32x2_t v2) { 1118 // CHECK: test_vceq_s32 1119 return vceq_s32(v1, v2); 1120 // CHECK: cmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1121 } 1122 1123 uint32x2_t test_vceq_f32(float32x2_t v1, float32x2_t v2) { 1124 // CHECK: test_vceq_f32 1125 return vceq_f32(v1, v2); 1126 // CHECK: fcmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1127 } 1128 1129 uint8x8_t test_vceq_u8(uint8x8_t v1, uint8x8_t v2) { 1130 // CHECK: test_vceq_u8 1131 return vceq_u8(v1, v2); 1132 // CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1133 } 1134 1135 uint16x4_t test_vceq_u16(uint16x4_t v1, uint16x4_t v2) { 1136 // CHECK: test_vceq_u16 1137 return vceq_u16(v1, v2); 1138 // CHECK: cmeq {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1139 } 1140 1141 uint32x2_t test_vceq_u32(uint32x2_t v1, uint32x2_t v2) { 1142 // CHECK: test_vceq_u32 1143 return vceq_u32(v1, v2); 1144 // CHECK: cmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1145 } 1146 1147 uint8x8_t test_vceq_p8(poly8x8_t v1, poly8x8_t v2) { 1148 // CHECK: test_vceq_p8 1149 return vceq_p8(v1, v2); 1150 // CHECK: cmeq {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1151 } 1152 1153 uint8x16_t test_vceqq_s8(int8x16_t v1, int8x16_t v2) { 1154 // CHECK: test_vceqq_s8 1155 return vceqq_s8(v1, v2); 1156 // CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1157 } 1158 1159 uint16x8_t test_vceqq_s16(int16x8_t v1, int16x8_t v2) { 1160 // CHECK: test_vceqq_s16 1161 return vceqq_s16(v1, v2); 1162 // CHECK: cmeq {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1163 } 1164 1165 uint32x4_t test_vceqq_s32(int32x4_t v1, int32x4_t v2) { 1166 // CHECK: test_vceqq_s32 1167 return vceqq_s32(v1, v2); 1168 // CHECK: cmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1169 } 1170 1171 uint32x4_t test_vceqq_f32(float32x4_t v1, float32x4_t v2) { 1172 // CHECK: test_vceqq_f32 1173 return vceqq_f32(v1, v2); 1174 // CHECK: fcmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1175 } 1176 1177 uint8x16_t test_vceqq_u8(uint8x16_t v1, uint8x16_t v2) { 1178 // CHECK: test_vceqq_u8 1179 return vceqq_u8(v1, v2); 1180 // CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1181 } 1182 1183 uint16x8_t test_vceqq_u16(uint16x8_t v1, uint16x8_t v2) { 1184 // CHECK: test_vceqq_u16 1185 return vceqq_u16(v1, v2); 1186 // CHECK: cmeq {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1187 } 1188 1189 uint32x4_t test_vceqq_u32(uint32x4_t v1, uint32x4_t v2) { 1190 // CHECK: test_vceqq_u32 1191 return vceqq_u32(v1, v2); 1192 // CHECK: cmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1193 } 1194 1195 uint8x16_t test_vceqq_p8(poly8x16_t v1, poly8x16_t v2) { 1196 // CHECK: test_vceqq_p8 1197 return vceqq_p8(v1, v2); 1198 // CHECK: cmeq {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1199 } 1200 1201 1202 uint64x2_t test_vceqq_s64(int64x2_t v1, int64x2_t v2) { 1203 // CHECK: test_vceqq_s64 1204 return vceqq_s64(v1, v2); 1205 // CHECK: cmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1206 } 1207 1208 uint64x2_t test_vceqq_u64(uint64x2_t v1, uint64x2_t v2) { 1209 // CHECK: test_vceqq_u64 1210 return vceqq_u64(v1, v2); 1211 // CHECK: cmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1212 } 1213 1214 uint64x2_t test_vceqq_f64(float64x2_t v1, float64x2_t v2) { 1215 // CHECK: test_vceqq_f64 1216 return vceqq_f64(v1, v2); 1217 // CHECK: fcmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1218 } 1219 uint8x8_t test_vcge_s8(int8x8_t v1, int8x8_t v2) { 1220 // CHECK: test_vcge_s8 1221 return vcge_s8(v1, v2); 1222 // CHECK: cmge {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1223 } 1224 1225 uint16x4_t test_vcge_s16(int16x4_t v1, int16x4_t v2) { 1226 // CHECK: test_vcge_s16 1227 return vcge_s16(v1, v2); 1228 // CHECK: cmge {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1229 } 1230 1231 uint32x2_t test_vcge_s32(int32x2_t v1, int32x2_t v2) { 1232 // CHECK: test_vcge_s32 1233 return vcge_s32(v1, v2); 1234 // CHECK: cmge {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1235 } 1236 1237 uint32x2_t test_vcge_f32(float32x2_t v1, float32x2_t v2) { 1238 // CHECK: test_vcge_f32 1239 return vcge_f32(v1, v2); 1240 // CHECK: fcmge {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1241 } 1242 1243 uint8x8_t test_vcge_u8(uint8x8_t v1, uint8x8_t v2) { 1244 // CHECK: test_vcge_u8 1245 return vcge_u8(v1, v2); 1246 // CHECK: cmhs {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1247 } 1248 1249 uint16x4_t test_vcge_u16(uint16x4_t v1, uint16x4_t v2) { 1250 // CHECK: test_vcge_u16 1251 return vcge_u16(v1, v2); 1252 // CHECK: cmhs {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1253 } 1254 1255 uint32x2_t test_vcge_u32(uint32x2_t v1, uint32x2_t v2) { 1256 // CHECK: test_vcge_u32 1257 return vcge_u32(v1, v2); 1258 // CHECK: cmhs {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1259 } 1260 1261 uint8x16_t test_vcgeq_s8(int8x16_t v1, int8x16_t v2) { 1262 // CHECK: test_vcgeq_s8 1263 return vcgeq_s8(v1, v2); 1264 // CHECK: cmge {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1265 } 1266 1267 uint16x8_t test_vcgeq_s16(int16x8_t v1, int16x8_t v2) { 1268 // CHECK: test_vcgeq_s16 1269 return vcgeq_s16(v1, v2); 1270 // CHECK: cmge {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1271 } 1272 1273 uint32x4_t test_vcgeq_s32(int32x4_t v1, int32x4_t v2) { 1274 // CHECK: test_vcgeq_s32 1275 return vcgeq_s32(v1, v2); 1276 // CHECK: cmge {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1277 } 1278 1279 uint32x4_t test_vcgeq_f32(float32x4_t v1, float32x4_t v2) { 1280 // CHECK: test_vcgeq_f32 1281 return vcgeq_f32(v1, v2); 1282 // CHECK: fcmge {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1283 } 1284 1285 uint8x16_t test_vcgeq_u8(uint8x16_t v1, uint8x16_t v2) { 1286 // CHECK: test_vcgeq_u8 1287 return vcgeq_u8(v1, v2); 1288 // CHECK: cmhs {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1289 } 1290 1291 uint16x8_t test_vcgeq_u16(uint16x8_t v1, uint16x8_t v2) { 1292 // CHECK: test_vcgeq_u16 1293 return vcgeq_u16(v1, v2); 1294 // CHECK: cmhs {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1295 } 1296 1297 uint32x4_t test_vcgeq_u32(uint32x4_t v1, uint32x4_t v2) { 1298 // CHECK: test_vcgeq_u32 1299 return vcgeq_u32(v1, v2); 1300 // CHECK: cmhs {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1301 } 1302 1303 uint64x2_t test_vcgeq_s64(int64x2_t v1, int64x2_t v2) { 1304 // CHECK: test_vcgeq_s64 1305 return vcgeq_s64(v1, v2); 1306 // CHECK: cmge {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1307 } 1308 1309 uint64x2_t test_vcgeq_u64(uint64x2_t v1, uint64x2_t v2) { 1310 // CHECK: test_vcgeq_u64 1311 return vcgeq_u64(v1, v2); 1312 // CHECK: cmhs {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1313 } 1314 1315 uint64x2_t test_vcgeq_f64(float64x2_t v1, float64x2_t v2) { 1316 // CHECK: test_vcgeq_f64 1317 return vcgeq_f64(v1, v2); 1318 // CHECK: fcmge {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1319 } 1320 1321 // Notes about vcle: 1322 // LE condition predicate implemented as GE, so check reversed operands. 1323 // Using registers other than v0, v1 are possible, but would be odd. 1324 uint8x8_t test_vcle_s8(int8x8_t v1, int8x8_t v2) { 1325 // CHECK: test_vcle_s8 1326 return vcle_s8(v1, v2); 1327 // CHECK: cmge {{v[0-9]+}}.8b, v1.8b, v0.8b 1328 } 1329 1330 uint16x4_t test_vcle_s16(int16x4_t v1, int16x4_t v2) { 1331 // CHECK: test_vcle_s16 1332 return vcle_s16(v1, v2); 1333 // CHECK: cmge {{v[0-9]+}}.4h, v1.4h, v0.4h 1334 } 1335 1336 uint32x2_t test_vcle_s32(int32x2_t v1, int32x2_t v2) { 1337 // CHECK: test_vcle_s32 1338 return vcle_s32(v1, v2); 1339 // CHECK: cmge {{v[0-9]+}}.2s, v1.2s, v0.2s 1340 } 1341 1342 uint32x2_t test_vcle_f32(float32x2_t v1, float32x2_t v2) { 1343 // CHECK: test_vcle_f32 1344 return vcle_f32(v1, v2); 1345 // CHECK: fcmge {{v[0-9]+}}.2s, v1.2s, v0.2s 1346 } 1347 1348 uint8x8_t test_vcle_u8(uint8x8_t v1, uint8x8_t v2) { 1349 // CHECK: test_vcle_u8 1350 return vcle_u8(v1, v2); 1351 // CHECK: cmhs {{v[0-9]+}}.8b, v1.8b, v0.8b 1352 } 1353 1354 uint16x4_t test_vcle_u16(uint16x4_t v1, uint16x4_t v2) { 1355 // CHECK: test_vcle_u16 1356 return vcle_u16(v1, v2); 1357 // CHECK: cmhs {{v[0-9]+}}.4h, v1.4h, v0.4h 1358 } 1359 1360 uint32x2_t test_vcle_u32(uint32x2_t v1, uint32x2_t v2) { 1361 // CHECK: test_vcle_u32 1362 return vcle_u32(v1, v2); 1363 // CHECK: cmhs {{v[0-9]+}}.2s, v1.2s, v0.2s 1364 } 1365 1366 uint8x16_t test_vcleq_s8(int8x16_t v1, int8x16_t v2) { 1367 // CHECK: test_vcleq_s8 1368 return vcleq_s8(v1, v2); 1369 // CHECK: cmge {{v[0-9]+}}.16b, v1.16b, v0.16b 1370 } 1371 1372 uint16x8_t test_vcleq_s16(int16x8_t v1, int16x8_t v2) { 1373 // CHECK: test_vcleq_s16 1374 return vcleq_s16(v1, v2); 1375 // CHECK: cmge {{v[0-9]+}}.8h, v1.8h, v0.8h 1376 } 1377 1378 uint32x4_t test_vcleq_s32(int32x4_t v1, int32x4_t v2) { 1379 // CHECK: test_vcleq_s32 1380 return vcleq_s32(v1, v2); 1381 // CHECK: cmge {{v[0-9]+}}.4s, v1.4s, v0.4s 1382 } 1383 1384 uint32x4_t test_vcleq_f32(float32x4_t v1, float32x4_t v2) { 1385 // CHECK: test_vcleq_f32 1386 return vcleq_f32(v1, v2); 1387 // CHECK: fcmge {{v[0-9]+}}.4s, v1.4s, v0.4s 1388 } 1389 1390 uint8x16_t test_vcleq_u8(uint8x16_t v1, uint8x16_t v2) { 1391 // CHECK: test_vcleq_u8 1392 return vcleq_u8(v1, v2); 1393 // CHECK: cmhs {{v[0-9]+}}.16b, v1.16b, v0.16b 1394 } 1395 1396 uint16x8_t test_vcleq_u16(uint16x8_t v1, uint16x8_t v2) { 1397 // CHECK: test_vcleq_u16 1398 return vcleq_u16(v1, v2); 1399 // CHECK: cmhs {{v[0-9]+}}.8h, v1.8h, v0.8h 1400 } 1401 1402 uint32x4_t test_vcleq_u32(uint32x4_t v1, uint32x4_t v2) { 1403 // CHECK: test_vcleq_u32 1404 return vcleq_u32(v1, v2); 1405 // CHECK: cmhs {{v[0-9]+}}.4s, v1.4s, v0.4s 1406 } 1407 1408 uint64x2_t test_vcleq_s64(int64x2_t v1, int64x2_t v2) { 1409 // CHECK: test_vcleq_s64 1410 return vcleq_s64(v1, v2); 1411 // CHECK: cmge {{v[0-9]+}}.2d, v1.2d, v0.2d 1412 } 1413 1414 uint64x2_t test_vcleq_u64(uint64x2_t v1, uint64x2_t v2) { 1415 // CHECK: test_vcleq_u64 1416 return vcleq_u64(v1, v2); 1417 // CHECK: cmhs {{v[0-9]+}}.2d, v1.2d, v0.2d 1418 } 1419 1420 uint64x2_t test_vcleq_f64(float64x2_t v1, float64x2_t v2) { 1421 // CHECK: test_vcleq_f64 1422 return vcleq_f64(v1, v2); 1423 // CHECK: fcmge {{v[0-9]+}}.2d, v1.2d, v0.2d 1424 } 1425 1426 1427 uint8x8_t test_vcgt_s8(int8x8_t v1, int8x8_t v2) { 1428 // CHECK: test_vcgt_s8 1429 return vcgt_s8(v1, v2); 1430 // CHECK: cmgt {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1431 } 1432 1433 uint16x4_t test_vcgt_s16(int16x4_t v1, int16x4_t v2) { 1434 // CHECK: test_vcgt_s16 1435 return vcgt_s16(v1, v2); 1436 // CHECK: cmgt {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1437 } 1438 1439 uint32x2_t test_vcgt_s32(int32x2_t v1, int32x2_t v2) { 1440 // CHECK: test_vcgt_s32 1441 return vcgt_s32(v1, v2); 1442 // CHECK: cmgt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1443 } 1444 1445 uint32x2_t test_vcgt_f32(float32x2_t v1, float32x2_t v2) { 1446 // CHECK: test_vcgt_f32 1447 return vcgt_f32(v1, v2); 1448 // CHECK: fcmgt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1449 } 1450 1451 uint8x8_t test_vcgt_u8(uint8x8_t v1, uint8x8_t v2) { 1452 // CHECK: test_vcgt_u8 1453 return vcgt_u8(v1, v2); 1454 // CHECK: cmhi {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1455 } 1456 1457 uint16x4_t test_vcgt_u16(uint16x4_t v1, uint16x4_t v2) { 1458 // CHECK: test_vcgt_u16 1459 return vcgt_u16(v1, v2); 1460 // CHECK: cmhi {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1461 } 1462 1463 uint32x2_t test_vcgt_u32(uint32x2_t v1, uint32x2_t v2) { 1464 // CHECK: test_vcgt_u32 1465 return vcgt_u32(v1, v2); 1466 // CHECK: cmhi {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1467 } 1468 1469 uint8x16_t test_vcgtq_s8(int8x16_t v1, int8x16_t v2) { 1470 // CHECK: test_vcgtq_s8 1471 return vcgtq_s8(v1, v2); 1472 // CHECK: cmgt {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1473 } 1474 1475 uint16x8_t test_vcgtq_s16(int16x8_t v1, int16x8_t v2) { 1476 // CHECK: test_vcgtq_s16 1477 return vcgtq_s16(v1, v2); 1478 // CHECK: cmgt {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1479 } 1480 1481 uint32x4_t test_vcgtq_s32(int32x4_t v1, int32x4_t v2) { 1482 // CHECK: test_vcgtq_s32 1483 return vcgtq_s32(v1, v2); 1484 // CHECK: cmgt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1485 } 1486 1487 uint32x4_t test_vcgtq_f32(float32x4_t v1, float32x4_t v2) { 1488 // CHECK: test_vcgtq_f32 1489 return vcgtq_f32(v1, v2); 1490 // CHECK: fcmgt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1491 } 1492 1493 uint8x16_t test_vcgtq_u8(uint8x16_t v1, uint8x16_t v2) { 1494 // CHECK: test_vcgtq_u8 1495 return vcgtq_u8(v1, v2); 1496 // CHECK: cmhi {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1497 } 1498 1499 uint16x8_t test_vcgtq_u16(uint16x8_t v1, uint16x8_t v2) { 1500 // CHECK: test_vcgtq_u16 1501 return vcgtq_u16(v1, v2); 1502 // CHECK: cmhi {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1503 } 1504 1505 uint32x4_t test_vcgtq_u32(uint32x4_t v1, uint32x4_t v2) { 1506 // CHECK: test_vcgtq_u32 1507 return vcgtq_u32(v1, v2); 1508 // CHECK: cmhi {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1509 } 1510 1511 uint64x2_t test_vcgtq_s64(int64x2_t v1, int64x2_t v2) { 1512 // CHECK: test_vcgtq_s64 1513 return vcgtq_s64(v1, v2); 1514 // CHECK: cmgt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1515 } 1516 1517 uint64x2_t test_vcgtq_u64(uint64x2_t v1, uint64x2_t v2) { 1518 // CHECK: test_vcgtq_u64 1519 return vcgtq_u64(v1, v2); 1520 // CHECK: cmhi {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1521 } 1522 1523 uint64x2_t test_vcgtq_f64(float64x2_t v1, float64x2_t v2) { 1524 // CHECK: test_vcgtq_f64 1525 return vcgtq_f64(v1, v2); 1526 // CHECK: fcmgt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1527 } 1528 1529 1530 // Notes about vclt: 1531 // LT condition predicate implemented as GT, so check reversed operands. 1532 // Using registers other than v0, v1 are possible, but would be odd. 1533 1534 uint8x8_t test_vclt_s8(int8x8_t v1, int8x8_t v2) { 1535 // CHECK: test_vclt_s8 1536 return vclt_s8(v1, v2); 1537 // CHECK: cmgt {{v[0-9]+}}.8b, v1.8b, v0.8b 1538 } 1539 1540 uint16x4_t test_vclt_s16(int16x4_t v1, int16x4_t v2) { 1541 // CHECK: test_vclt_s16 1542 return vclt_s16(v1, v2); 1543 // CHECK: cmgt {{v[0-9]+}}.4h, v1.4h, v0.4h 1544 } 1545 1546 uint32x2_t test_vclt_s32(int32x2_t v1, int32x2_t v2) { 1547 // CHECK: test_vclt_s32 1548 return vclt_s32(v1, v2); 1549 // CHECK: cmgt {{v[0-9]+}}.2s, v1.2s, v0.2s 1550 } 1551 1552 uint32x2_t test_vclt_f32(float32x2_t v1, float32x2_t v2) { 1553 // CHECK: test_vclt_f32 1554 return vclt_f32(v1, v2); 1555 // CHECK: fcmgt {{v[0-9]+}}.2s, v1.2s, v0.2s 1556 } 1557 1558 uint8x8_t test_vclt_u8(uint8x8_t v1, uint8x8_t v2) { 1559 // CHECK: test_vclt_u8 1560 return vclt_u8(v1, v2); 1561 // CHECK: cmhi {{v[0-9]+}}.8b, v1.8b, v0.8b 1562 } 1563 1564 uint16x4_t test_vclt_u16(uint16x4_t v1, uint16x4_t v2) { 1565 // CHECK: test_vclt_u16 1566 return vclt_u16(v1, v2); 1567 // CHECK: cmhi {{v[0-9]+}}.4h, v1.4h, v0.4h 1568 } 1569 1570 uint32x2_t test_vclt_u32(uint32x2_t v1, uint32x2_t v2) { 1571 // CHECK: test_vclt_u32 1572 return vclt_u32(v1, v2); 1573 // CHECK: cmhi {{v[0-9]+}}.2s, v1.2s, v0.2s 1574 } 1575 1576 uint8x16_t test_vcltq_s8(int8x16_t v1, int8x16_t v2) { 1577 // CHECK: test_vcltq_s8 1578 return vcltq_s8(v1, v2); 1579 // CHECK: cmgt {{v[0-9]+}}.16b, v1.16b, v0.16b 1580 } 1581 1582 uint16x8_t test_vcltq_s16(int16x8_t v1, int16x8_t v2) { 1583 // CHECK: test_vcltq_s16 1584 return vcltq_s16(v1, v2); 1585 // CHECK: cmgt {{v[0-9]+}}.8h, v1.8h, v0.8h 1586 } 1587 1588 uint32x4_t test_vcltq_s32(int32x4_t v1, int32x4_t v2) { 1589 // CHECK: test_vcltq_s32 1590 return vcltq_s32(v1, v2); 1591 // CHECK: cmgt {{v[0-9]+}}.4s, v1.4s, v0.4s 1592 } 1593 1594 uint32x4_t test_vcltq_f32(float32x4_t v1, float32x4_t v2) { 1595 // CHECK: test_vcltq_f32 1596 return vcltq_f32(v1, v2); 1597 // CHECK: fcmgt {{v[0-9]+}}.4s, v1.4s, v0.4s 1598 } 1599 1600 uint8x16_t test_vcltq_u8(uint8x16_t v1, uint8x16_t v2) { 1601 // CHECK: test_vcltq_u8 1602 return vcltq_u8(v1, v2); 1603 // CHECK: cmhi {{v[0-9]+}}.16b, v1.16b, v0.16b 1604 } 1605 1606 uint16x8_t test_vcltq_u16(uint16x8_t v1, uint16x8_t v2) { 1607 // CHECK: test_vcltq_u16 1608 return vcltq_u16(v1, v2); 1609 // CHECK: cmhi {{v[0-9]+}}.8h, v1.8h, v0.8h 1610 } 1611 1612 uint32x4_t test_vcltq_u32(uint32x4_t v1, uint32x4_t v2) { 1613 // CHECK: test_vcltq_u32 1614 return vcltq_u32(v1, v2); 1615 // CHECK: cmhi {{v[0-9]+}}.4s, v1.4s, v0.4s 1616 } 1617 1618 uint64x2_t test_vcltq_s64(int64x2_t v1, int64x2_t v2) { 1619 // CHECK: test_vcltq_s64 1620 return vcltq_s64(v1, v2); 1621 // CHECK: cmgt {{v[0-9]+}}.2d, v1.2d, v0.2d 1622 } 1623 1624 uint64x2_t test_vcltq_u64(uint64x2_t v1, uint64x2_t v2) { 1625 // CHECK: test_vcltq_u64 1626 return vcltq_u64(v1, v2); 1627 // CHECK: cmhi {{v[0-9]+}}.2d, v1.2d, v0.2d 1628 } 1629 1630 uint64x2_t test_vcltq_f64(float64x2_t v1, float64x2_t v2) { 1631 // CHECK: test_vcltq_f64 1632 return vcltq_f64(v1, v2); 1633 // CHECK: fcmgt {{v[0-9]+}}.2d, v1.2d, v0.2d 1634 } 1635 1636 1637 int8x8_t test_vhadd_s8(int8x8_t v1, int8x8_t v2) { 1638 // CHECK: test_vhadd_s8 1639 return vhadd_s8(v1, v2); 1640 // CHECK: shadd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1641 } 1642 1643 int16x4_t test_vhadd_s16(int16x4_t v1, int16x4_t v2) { 1644 // CHECK: test_vhadd_s16 1645 return vhadd_s16(v1, v2); 1646 // CHECK: shadd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1647 } 1648 1649 int32x2_t test_vhadd_s32(int32x2_t v1, int32x2_t v2) { 1650 // CHECK: test_vhadd_s32 1651 return vhadd_s32(v1, v2); 1652 // CHECK: shadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1653 } 1654 1655 uint8x8_t test_vhadd_u8(uint8x8_t v1, uint8x8_t v2) { 1656 // CHECK: test_vhadd_u8 1657 return vhadd_u8(v1, v2); 1658 // CHECK: uhadd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1659 } 1660 1661 uint16x4_t test_vhadd_u16(uint16x4_t v1, uint16x4_t v2) { 1662 // CHECK: test_vhadd_u16 1663 return vhadd_u16(v1, v2); 1664 // CHECK: uhadd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1665 } 1666 1667 uint32x2_t test_vhadd_u32(uint32x2_t v1, uint32x2_t v2) { 1668 // CHECK: test_vhadd_u32 1669 return vhadd_u32(v1, v2); 1670 // CHECK: uhadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1671 } 1672 1673 int8x16_t test_vhaddq_s8(int8x16_t v1, int8x16_t v2) { 1674 // CHECK: test_vhaddq_s8 1675 return vhaddq_s8(v1, v2); 1676 // CHECK: shadd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1677 } 1678 1679 int16x8_t test_vhaddq_s16(int16x8_t v1, int16x8_t v2) { 1680 // CHECK: test_vhaddq_s16 1681 return vhaddq_s16(v1, v2); 1682 // CHECK: shadd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1683 } 1684 1685 int32x4_t test_vhaddq_s32(int32x4_t v1, int32x4_t v2) { 1686 // CHECK: test_vhaddq_s32 1687 return vhaddq_s32(v1, v2); 1688 // CHECK: shadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1689 } 1690 1691 uint8x16_t test_vhaddq_u8(uint8x16_t v1, uint8x16_t v2) { 1692 // CHECK: test_vhaddq_u8 1693 return vhaddq_u8(v1, v2); 1694 // CHECK: uhadd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1695 } 1696 1697 uint16x8_t test_vhaddq_u16(uint16x8_t v1, uint16x8_t v2) { 1698 // CHECK: test_vhaddq_u16 1699 return vhaddq_u16(v1, v2); 1700 // CHECK: uhadd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1701 } 1702 1703 uint32x4_t test_vhaddq_u32(uint32x4_t v1, uint32x4_t v2) { 1704 // CHECK: test_vhaddq_u32 1705 return vhaddq_u32(v1, v2); 1706 // CHECK: uhadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1707 } 1708 1709 1710 int8x8_t test_vhsub_s8(int8x8_t v1, int8x8_t v2) { 1711 // CHECK: test_vhsub_s8 1712 return vhsub_s8(v1, v2); 1713 // CHECK: shsub {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1714 } 1715 1716 int16x4_t test_vhsub_s16(int16x4_t v1, int16x4_t v2) { 1717 // CHECK: test_vhsub_s16 1718 return vhsub_s16(v1, v2); 1719 // CHECK: shsub {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1720 } 1721 1722 int32x2_t test_vhsub_s32(int32x2_t v1, int32x2_t v2) { 1723 // CHECK: test_vhsub_s32 1724 return vhsub_s32(v1, v2); 1725 // CHECK: shsub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1726 } 1727 1728 uint8x8_t test_vhsub_u8(uint8x8_t v1, uint8x8_t v2) { 1729 // CHECK: test_vhsub_u8 1730 return vhsub_u8(v1, v2); 1731 // CHECK: uhsub {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1732 } 1733 1734 uint16x4_t test_vhsub_u16(uint16x4_t v1, uint16x4_t v2) { 1735 // CHECK: test_vhsub_u16 1736 return vhsub_u16(v1, v2); 1737 // CHECK: uhsub {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1738 } 1739 1740 uint32x2_t test_vhsub_u32(uint32x2_t v1, uint32x2_t v2) { 1741 // CHECK: test_vhsub_u32 1742 return vhsub_u32(v1, v2); 1743 // CHECK: uhsub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1744 } 1745 1746 int8x16_t test_vhsubq_s8(int8x16_t v1, int8x16_t v2) { 1747 // CHECK: test_vhsubq_s8 1748 return vhsubq_s8(v1, v2); 1749 // CHECK: shsub {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1750 } 1751 1752 int16x8_t test_vhsubq_s16(int16x8_t v1, int16x8_t v2) { 1753 // CHECK: test_vhsubq_s16 1754 return vhsubq_s16(v1, v2); 1755 // CHECK: shsub {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1756 } 1757 1758 int32x4_t test_vhsubq_s32(int32x4_t v1, int32x4_t v2) { 1759 // CHECK: test_vhsubq_s32 1760 return vhsubq_s32(v1, v2); 1761 // CHECK: shsub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1762 } 1763 1764 uint8x16_t test_vhsubq_u8(uint8x16_t v1, uint8x16_t v2) { 1765 // CHECK: test_vhsubq_u8 1766 return vhsubq_u8(v1, v2); 1767 // CHECK: uhsub {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1768 } 1769 1770 uint16x8_t test_vhsubq_u16(uint16x8_t v1, uint16x8_t v2) { 1771 // CHECK: test_vhsubq_u16 1772 return vhsubq_u16(v1, v2); 1773 // CHECK: uhsub {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1774 } 1775 1776 uint32x4_t test_vhsubq_u32(uint32x4_t v1, uint32x4_t v2) { 1777 // CHECK: test_vhsubq_u32 1778 return vhsubq_u32(v1, v2); 1779 // CHECK: uhsub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1780 } 1781 1782 1783 int8x8_t test_vrhadd_s8(int8x8_t v1, int8x8_t v2) { 1784 // CHECK: test_vrhadd_s8 1785 return vrhadd_s8(v1, v2); 1786 // CHECK: srhadd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1787 } 1788 1789 int16x4_t test_vrhadd_s16(int16x4_t v1, int16x4_t v2) { 1790 // CHECK: test_vrhadd_s16 1791 return vrhadd_s16(v1, v2); 1792 // CHECK: srhadd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1793 } 1794 1795 int32x2_t test_vrhadd_s32(int32x2_t v1, int32x2_t v2) { 1796 // CHECK: test_vrhadd_s32 1797 return vrhadd_s32(v1, v2); 1798 // CHECK: srhadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1799 } 1800 1801 uint8x8_t test_vrhadd_u8(uint8x8_t v1, uint8x8_t v2) { 1802 // CHECK: test_vrhadd_u8 1803 return vrhadd_u8(v1, v2); 1804 // CHECK: urhadd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1805 } 1806 1807 uint16x4_t test_vrhadd_u16(uint16x4_t v1, uint16x4_t v2) { 1808 // CHECK: test_vrhadd_u16 1809 return vrhadd_u16(v1, v2); 1810 // CHECK: urhadd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1811 } 1812 1813 uint32x2_t test_vrhadd_u32(uint32x2_t v1, uint32x2_t v2) { 1814 // CHECK: test_vrhadd_u32 1815 return vrhadd_u32(v1, v2); 1816 // CHECK: urhadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1817 } 1818 1819 int8x16_t test_vrhaddq_s8(int8x16_t v1, int8x16_t v2) { 1820 // CHECK: test_vrhaddq_s8 1821 return vrhaddq_s8(v1, v2); 1822 // CHECK: srhadd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1823 } 1824 1825 int16x8_t test_vrhaddq_s16(int16x8_t v1, int16x8_t v2) { 1826 // CHECK: test_vrhaddq_s16 1827 return vrhaddq_s16(v1, v2); 1828 // CHECK: srhadd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1829 } 1830 1831 int32x4_t test_vrhaddq_s32(int32x4_t v1, int32x4_t v2) { 1832 // CHECK: test_vrhaddq_s32 1833 return vrhaddq_s32(v1, v2); 1834 // CHECK: srhadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1835 } 1836 1837 uint8x16_t test_vrhaddq_u8(uint8x16_t v1, uint8x16_t v2) { 1838 // CHECK: test_vrhaddq_u8 1839 return vrhaddq_u8(v1, v2); 1840 // CHECK: urhadd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1841 } 1842 1843 uint16x8_t test_vrhaddq_u16(uint16x8_t v1, uint16x8_t v2) { 1844 // CHECK: test_vrhaddq_u16 1845 return vrhaddq_u16(v1, v2); 1846 // CHECK: urhadd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1847 } 1848 1849 uint32x4_t test_vrhaddq_u32(uint32x4_t v1, uint32x4_t v2) { 1850 // CHECK: test_vrhaddq_u32 1851 return vrhaddq_u32(v1, v2); 1852 // CHECK: urhadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1853 } 1854 int8x8_t test_vqadd_s8(int8x8_t a, int8x8_t b) { 1855 // CHECK: test_vqadd_s8 1856 return vqadd_s8(a, b); 1857 // CHECK: sqadd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1858 } 1859 1860 int16x4_t test_vqadd_s16(int16x4_t a, int16x4_t b) { 1861 // CHECK: test_vqadd_s16 1862 return vqadd_s16(a, b); 1863 // CHECK: sqadd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1864 } 1865 1866 int32x2_t test_vqadd_s32(int32x2_t a, int32x2_t b) { 1867 // CHECK: test_vqadd_s32 1868 return vqadd_s32(a, b); 1869 // CHECK: sqadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1870 } 1871 1872 int64x1_t test_vqadd_s64(int64x1_t a, int64x1_t b) { 1873 // CHECK: test_vqadd_s64 1874 return vqadd_s64(a, b); 1875 // CHECK: sqadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 1876 } 1877 1878 uint8x8_t test_vqadd_u8(uint8x8_t a, uint8x8_t b) { 1879 // CHECK: test_vqadd_u8 1880 return vqadd_u8(a, b); 1881 // CHECK: uqadd {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1882 } 1883 1884 uint16x4_t test_vqadd_u16(uint16x4_t a, uint16x4_t b) { 1885 // CHECK: test_vqadd_u16 1886 return vqadd_u16(a, b); 1887 // CHECK: uqadd {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1888 } 1889 1890 uint32x2_t test_vqadd_u32(uint32x2_t a, uint32x2_t b) { 1891 // CHECK: test_vqadd_u32 1892 return vqadd_u32(a, b); 1893 // CHECK: uqadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1894 } 1895 1896 uint64x1_t test_vqadd_u64(uint64x1_t a, uint64x1_t b) { 1897 // CHECK: test_vqadd_u64 1898 return vqadd_u64(a, b); 1899 // CHECK: uqadd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 1900 } 1901 1902 int8x16_t test_vqaddq_s8(int8x16_t a, int8x16_t b) { 1903 // CHECK: test_vqaddq_s8 1904 return vqaddq_s8(a, b); 1905 // CHECK: sqadd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1906 } 1907 1908 int16x8_t test_vqaddq_s16(int16x8_t a, int16x8_t b) { 1909 // CHECK: test_vqaddq_s16 1910 return vqaddq_s16(a, b); 1911 // CHECK: sqadd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1912 } 1913 1914 int32x4_t test_vqaddq_s32(int32x4_t a, int32x4_t b) { 1915 // CHECK: test_vqaddq_s32 1916 return vqaddq_s32(a, b); 1917 // CHECK: sqadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1918 } 1919 1920 int64x2_t test_vqaddq_s64(int64x2_t a, int64x2_t b) { 1921 // CHECK: test_vqaddq_s64 1922 return vqaddq_s64(a, b); 1923 // CHECK: sqadd {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1924 } 1925 1926 uint8x16_t test_vqaddq_u8(uint8x16_t a, uint8x16_t b) { 1927 // CHECK: test_vqaddq_u8 1928 return vqaddq_u8(a, b); 1929 // CHECK: uqadd {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1930 } 1931 1932 uint16x8_t test_vqaddq_u16(uint16x8_t a, uint16x8_t b) { 1933 // CHECK: test_vqaddq_u16 1934 return vqaddq_u16(a, b); 1935 // CHECK: uqadd {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1936 } 1937 1938 uint32x4_t test_vqaddq_u32(uint32x4_t a, uint32x4_t b) { 1939 // CHECK: test_vqaddq_u32 1940 return vqaddq_u32(a, b); 1941 // CHECK: uqadd {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1942 } 1943 1944 uint64x2_t test_vqaddq_u64(uint64x2_t a, uint64x2_t b) { 1945 // CHECK: test_vqaddq_u64 1946 return vqaddq_u64(a, b); 1947 // CHECK: uqadd {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1948 } 1949 1950 1951 int8x8_t test_vqsub_s8(int8x8_t a, int8x8_t b) { 1952 // CHECK: test_vqsub_s8 1953 return vqsub_s8(a, b); 1954 // CHECK: sqsub {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1955 } 1956 1957 int16x4_t test_vqsub_s16(int16x4_t a, int16x4_t b) { 1958 // CHECK: test_vqsub_s16 1959 return vqsub_s16(a, b); 1960 // CHECK: sqsub {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1961 } 1962 1963 int32x2_t test_vqsub_s32(int32x2_t a, int32x2_t b) { 1964 // CHECK: test_vqsub_s32 1965 return vqsub_s32(a, b); 1966 // CHECK: sqsub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1967 } 1968 1969 int64x1_t test_vqsub_s64(int64x1_t a, int64x1_t b) { 1970 // CHECK: test_vqsub_s64 1971 return vqsub_s64(a, b); 1972 // CHECK: sqsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 1973 } 1974 1975 uint8x8_t test_vqsub_u8(uint8x8_t a, uint8x8_t b) { 1976 // CHECK: test_vqsub_u8 1977 return vqsub_u8(a, b); 1978 // CHECK: uqsub {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1979 } 1980 1981 uint16x4_t test_vqsub_u16(uint16x4_t a, uint16x4_t b) { 1982 // CHECK: test_vqsub_u16 1983 return vqsub_u16(a, b); 1984 // CHECK: uqsub {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1985 } 1986 1987 uint32x2_t test_vqsub_u32(uint32x2_t a, uint32x2_t b) { 1988 // CHECK: test_vqsub_u32 1989 return vqsub_u32(a, b); 1990 // CHECK: uqsub {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1991 } 1992 1993 uint64x1_t test_vqsub_u64(uint64x1_t a, uint64x1_t b) { 1994 // CHECK: test_vqsub_u64 1995 return vqsub_u64(a, b); 1996 // CHECK: uqsub {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 1997 } 1998 1999 int8x16_t test_vqsubq_s8(int8x16_t a, int8x16_t b) { 2000 // CHECK: test_vqsubq_s8 2001 return vqsubq_s8(a, b); 2002 // CHECK: sqsub {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2003 } 2004 2005 int16x8_t test_vqsubq_s16(int16x8_t a, int16x8_t b) { 2006 // CHECK: test_vqsubq_s16 2007 return vqsubq_s16(a, b); 2008 // CHECK: sqsub {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2009 } 2010 2011 int32x4_t test_vqsubq_s32(int32x4_t a, int32x4_t b) { 2012 // CHECK: test_vqsubq_s32 2013 return vqsubq_s32(a, b); 2014 // CHECK: sqsub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2015 } 2016 2017 int64x2_t test_vqsubq_s64(int64x2_t a, int64x2_t b) { 2018 // CHECK: test_vqsubq_s64 2019 return vqsubq_s64(a, b); 2020 // CHECK: sqsub {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2021 } 2022 2023 uint8x16_t test_vqsubq_u8(uint8x16_t a, uint8x16_t b) { 2024 // CHECK: test_vqsubq_u8 2025 return vqsubq_u8(a, b); 2026 // CHECK: uqsub {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2027 } 2028 2029 uint16x8_t test_vqsubq_u16(uint16x8_t a, uint16x8_t b) { 2030 // CHECK: test_vqsubq_u16 2031 return vqsubq_u16(a, b); 2032 // CHECK: uqsub {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2033 } 2034 2035 uint32x4_t test_vqsubq_u32(uint32x4_t a, uint32x4_t b) { 2036 // CHECK: test_vqsubq_u32 2037 return vqsubq_u32(a, b); 2038 // CHECK: uqsub {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2039 } 2040 2041 uint64x2_t test_vqsubq_u64(uint64x2_t a, uint64x2_t b) { 2042 // CHECK: test_vqsubq_u64 2043 return vqsubq_u64(a, b); 2044 // CHECK: uqsub {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2045 } 2046 2047 2048 int8x8_t test_vshl_s8(int8x8_t a, int8x8_t b) { 2049 // CHECK: test_vshl_s8 2050 return vshl_s8(a, b); 2051 // CHECK: sshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2052 } 2053 2054 int16x4_t test_vshl_s16(int16x4_t a, int16x4_t b) { 2055 // CHECK: test_vshl_s16 2056 return vshl_s16(a, b); 2057 // CHECK: sshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2058 } 2059 2060 int32x2_t test_vshl_s32(int32x2_t a, int32x2_t b) { 2061 // CHECK: test_vshl_s32 2062 return vshl_s32(a, b); 2063 // CHECK: sshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2064 } 2065 2066 int64x1_t test_vshl_s64(int64x1_t a, int64x1_t b) { 2067 // CHECK: test_vshl_s64 2068 return vshl_s64(a, b); 2069 // CHECK: sshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2070 } 2071 2072 uint8x8_t test_vshl_u8(uint8x8_t a, int8x8_t b) { 2073 // CHECK: test_vshl_u8 2074 return vshl_u8(a, b); 2075 // CHECK: ushl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2076 } 2077 2078 uint16x4_t test_vshl_u16(uint16x4_t a, int16x4_t b) { 2079 // CHECK: test_vshl_u16 2080 return vshl_u16(a, b); 2081 // CHECK: ushl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2082 } 2083 2084 uint32x2_t test_vshl_u32(uint32x2_t a, int32x2_t b) { 2085 // CHECK: test_vshl_u32 2086 return vshl_u32(a, b); 2087 // CHECK: ushl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2088 } 2089 2090 uint64x1_t test_vshl_u64(uint64x1_t a, int64x1_t b) { 2091 // CHECK: test_vshl_u64 2092 return vshl_u64(a, b); 2093 // CHECK: ushl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2094 } 2095 2096 int8x16_t test_vshlq_s8(int8x16_t a, int8x16_t b) { 2097 // CHECK: test_vshlq_s8 2098 return vshlq_s8(a, b); 2099 // CHECK: sshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2100 } 2101 2102 int16x8_t test_vshlq_s16(int16x8_t a, int16x8_t b) { 2103 // CHECK: test_vshlq_s16 2104 return vshlq_s16(a, b); 2105 // CHECK: sshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2106 } 2107 2108 int32x4_t test_vshlq_s32(int32x4_t a, int32x4_t b) { 2109 // CHECK: test_vshlq_s32 2110 return vshlq_s32(a, b); 2111 // CHECK: sshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2112 } 2113 2114 int64x2_t test_vshlq_s64(int64x2_t a, int64x2_t b) { 2115 // CHECK: test_vshlq_s64 2116 return vshlq_s64(a, b); 2117 // CHECK: sshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2118 } 2119 2120 uint8x16_t test_vshlq_u8(uint8x16_t a, int8x16_t b) { 2121 // CHECK: test_vshlq_u8 2122 return vshlq_u8(a, b); 2123 // CHECK: ushl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2124 } 2125 2126 uint16x8_t test_vshlq_u16(uint16x8_t a, int16x8_t b) { 2127 // CHECK: test_vshlq_u16 2128 return vshlq_u16(a, b); 2129 // CHECK: ushl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2130 } 2131 2132 uint32x4_t test_vshlq_u32(uint32x4_t a, int32x4_t b) { 2133 // CHECK: test_vshlq_u32 2134 return vshlq_u32(a, b); 2135 // CHECK: ushl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2136 } 2137 2138 uint64x2_t test_vshlq_u64(uint64x2_t a, int64x2_t b) { 2139 // CHECK: test_vshlq_u64 2140 return vshlq_u64(a, b); 2141 // CHECK: ushl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2142 } 2143 2144 2145 int8x8_t test_vqshl_s8(int8x8_t a, int8x8_t b) { 2146 // CHECK: test_vqshl_s8 2147 return vqshl_s8(a, b); 2148 // CHECK: sqshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2149 } 2150 2151 int16x4_t test_vqshl_s16(int16x4_t a, int16x4_t b) { 2152 // CHECK: test_vqshl_s16 2153 return vqshl_s16(a, b); 2154 // CHECK: sqshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2155 } 2156 2157 int32x2_t test_vqshl_s32(int32x2_t a, int32x2_t b) { 2158 // CHECK: test_vqshl_s32 2159 return vqshl_s32(a, b); 2160 // CHECK: sqshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2161 } 2162 2163 int64x1_t test_vqshl_s64(int64x1_t a, int64x1_t b) { 2164 // CHECK: test_vqshl_s64 2165 return vqshl_s64(a, b); 2166 // CHECK: sqshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2167 } 2168 2169 uint8x8_t test_vqshl_u8(uint8x8_t a, int8x8_t b) { 2170 // CHECK: test_vqshl_u8 2171 return vqshl_u8(a, b); 2172 // CHECK: uqshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2173 } 2174 2175 uint16x4_t test_vqshl_u16(uint16x4_t a, int16x4_t b) { 2176 // CHECK: test_vqshl_u16 2177 return vqshl_u16(a, b); 2178 // CHECK: uqshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2179 } 2180 2181 uint32x2_t test_vqshl_u32(uint32x2_t a, int32x2_t b) { 2182 // CHECK: test_vqshl_u32 2183 return vqshl_u32(a, b); 2184 // CHECK: uqshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2185 } 2186 2187 uint64x1_t test_vqshl_u64(uint64x1_t a, int64x1_t b) { 2188 // CHECK: test_vqshl_u64 2189 return vqshl_u64(a, b); 2190 // CHECK: uqshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2191 } 2192 2193 int8x16_t test_vqshlq_s8(int8x16_t a, int8x16_t b) { 2194 // CHECK: test_vqshlq_s8 2195 return vqshlq_s8(a, b); 2196 // CHECK: sqshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2197 } 2198 2199 int16x8_t test_vqshlq_s16(int16x8_t a, int16x8_t b) { 2200 // CHECK: test_vqshlq_s16 2201 return vqshlq_s16(a, b); 2202 // CHECK: sqshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2203 } 2204 2205 int32x4_t test_vqshlq_s32(int32x4_t a, int32x4_t b) { 2206 // CHECK: test_vqshlq_s32 2207 return vqshlq_s32(a, b); 2208 // CHECK: sqshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2209 } 2210 2211 int64x2_t test_vqshlq_s64(int64x2_t a, int64x2_t b) { 2212 // CHECK: test_vqshlq_s64 2213 return vqshlq_s64(a, b); 2214 // CHECK: sqshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2215 } 2216 2217 uint8x16_t test_vqshlq_u8(uint8x16_t a, int8x16_t b) { 2218 // CHECK: test_vqshlq_u8 2219 return vqshlq_u8(a, b); 2220 // CHECK: uqshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2221 } 2222 2223 uint16x8_t test_vqshlq_u16(uint16x8_t a, int16x8_t b) { 2224 // CHECK: test_vqshlq_u16 2225 return vqshlq_u16(a, b); 2226 // CHECK: uqshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2227 } 2228 2229 uint32x4_t test_vqshlq_u32(uint32x4_t a, int32x4_t b) { 2230 // CHECK: test_vqshlq_u32 2231 return vqshlq_u32(a, b); 2232 // CHECK: uqshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2233 } 2234 2235 uint64x2_t test_vqshlq_u64(uint64x2_t a, int64x2_t b) { 2236 // CHECK: test_vqshlq_u32 2237 return vqshlq_u64(a, b); 2238 // CHECK: uqshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2239 } 2240 2241 int8x8_t test_vrshl_s8(int8x8_t a, int8x8_t b) { 2242 // CHECK: test_vrshl_s8 2243 return vrshl_s8(a, b); 2244 // CHECK: srshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2245 } 2246 2247 int16x4_t test_vrshl_s16(int16x4_t a, int16x4_t b) { 2248 // CHECK: test_vrshl_s16 2249 return vrshl_s16(a, b); 2250 // CHECK: srshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2251 } 2252 2253 int32x2_t test_vrshl_s32(int32x2_t a, int32x2_t b) { 2254 // CHECK: test_vrshl_s32 2255 return vrshl_s32(a, b); 2256 // CHECK: srshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2257 } 2258 2259 int64x1_t test_vrshl_s64(int64x1_t a, int64x1_t b) { 2260 // CHECK: test_vrshl_s64 2261 return vrshl_s64(a, b); 2262 // CHECK: srshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2263 } 2264 2265 uint8x8_t test_vrshl_u8(uint8x8_t a, int8x8_t b) { 2266 // CHECK: test_vrshl_u8 2267 return vrshl_u8(a, b); 2268 // CHECK: urshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2269 } 2270 2271 uint16x4_t test_vrshl_u16(uint16x4_t a, int16x4_t b) { 2272 // CHECK: test_vrshl_u16 2273 return vrshl_u16(a, b); 2274 // CHECK: urshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2275 } 2276 2277 uint32x2_t test_vrshl_u32(uint32x2_t a, int32x2_t b) { 2278 // CHECK: test_vrshl_u32 2279 return vrshl_u32(a, b); 2280 // CHECK: urshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2281 } 2282 2283 uint64x1_t test_vrshl_u64(uint64x1_t a, int64x1_t b) { 2284 // CHECK: test_vrshl_u64 2285 return vrshl_u64(a, b); 2286 // CHECK: urshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2287 } 2288 2289 int8x16_t test_vrshlq_s8(int8x16_t a, int8x16_t b) { 2290 // CHECK: test_vrshlq_s8 2291 return vrshlq_s8(a, b); 2292 // CHECK: srshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2293 } 2294 2295 int16x8_t test_vrshlq_s16(int16x8_t a, int16x8_t b) { 2296 // CHECK: test_vrshlq_s16 2297 return vrshlq_s16(a, b); 2298 // CHECK: srshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2299 } 2300 2301 int32x4_t test_vrshlq_s32(int32x4_t a, int32x4_t b) { 2302 // CHECK: test_vrshlq_s32 2303 return vrshlq_s32(a, b); 2304 // CHECK: srshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2305 } 2306 2307 int64x2_t test_vrshlq_s64(int64x2_t a, int64x2_t b) { 2308 // CHECK: test_vrshlq_s64 2309 return vrshlq_s64(a, b); 2310 // CHECK: srshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2311 } 2312 2313 uint8x16_t test_vrshlq_u8(uint8x16_t a, int8x16_t b) { 2314 // CHECK: test_vrshlq_u8 2315 return vrshlq_u8(a, b); 2316 // CHECK: urshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2317 } 2318 2319 uint16x8_t test_vrshlq_u16(uint16x8_t a, int16x8_t b) { 2320 // CHECK: test_vrshlq_u16 2321 return vrshlq_u16(a, b); 2322 // CHECK: urshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2323 } 2324 2325 uint32x4_t test_vrshlq_u32(uint32x4_t a, int32x4_t b) { 2326 // CHECK: test_vrshlq_u32 2327 return vrshlq_u32(a, b); 2328 // CHECK: urshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2329 } 2330 2331 uint64x2_t test_vrshlq_u64(uint64x2_t a, int64x2_t b) { 2332 // CHECK: test_vrshlq_u64 2333 return vrshlq_u64(a, b); 2334 // CHECK: urshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2335 } 2336 2337 2338 int8x8_t test_vqrshl_s8(int8x8_t a, int8x8_t b) { 2339 // CHECK: test_vqrshl_s8 2340 return vqrshl_s8(a, b); 2341 // CHECK: sqrshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2342 } 2343 2344 int16x4_t test_vqrshl_s16(int16x4_t a, int16x4_t b) { 2345 // CHECK: test_vqrshl_s16 2346 return vqrshl_s16(a, b); 2347 // CHECK: sqrshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2348 } 2349 2350 int32x2_t test_vqrshl_s32(int32x2_t a, int32x2_t b) { 2351 // CHECK: test_vqrshl_s32 2352 return vqrshl_s32(a, b); 2353 // CHECK: sqrshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2354 } 2355 2356 int64x1_t test_vqrshl_s64(int64x1_t a, int64x1_t b) { 2357 // CHECK: test_vqrshl_s64 2358 return vqrshl_s64(a, b); 2359 // CHECK: sqrshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2360 } 2361 2362 uint8x8_t test_vqrshl_u8(uint8x8_t a, int8x8_t b) { 2363 // CHECK: test_vqrshl_u8 2364 return vqrshl_u8(a, b); 2365 // CHECK: uqrshl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2366 } 2367 2368 uint16x4_t test_vqrshl_u16(uint16x4_t a, int16x4_t b) { 2369 // CHECK: test_vqrshl_u16 2370 return vqrshl_u16(a, b); 2371 // CHECK: uqrshl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2372 } 2373 2374 uint32x2_t test_vqrshl_u32(uint32x2_t a, int32x2_t b) { 2375 // CHECK: test_vqrshl_u32 2376 return vqrshl_u32(a, b); 2377 // CHECK: uqrshl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2378 } 2379 2380 uint64x1_t test_vqrshl_u64(uint64x1_t a, int64x1_t b) { 2381 // CHECK: test_vqrshl_u64 2382 return vqrshl_u64(a, b); 2383 // CHECK: uqrshl {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}} 2384 } 2385 2386 int8x16_t test_vqrshlq_s8(int8x16_t a, int8x16_t b) { 2387 // CHECK: test_vqrshlq_s8 2388 return vqrshlq_s8(a, b); 2389 // CHECK: sqrshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2390 } 2391 2392 int16x8_t test_vqrshlq_s16(int16x8_t a, int16x8_t b) { 2393 // CHECK: test_vqrshlq_s16 2394 return vqrshlq_s16(a, b); 2395 // CHECK: sqrshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2396 } 2397 2398 int32x4_t test_vqrshlq_s32(int32x4_t a, int32x4_t b) { 2399 // CHECK: test_vqrshlq_s32 2400 return vqrshlq_s32(a, b); 2401 // CHECK: sqrshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2402 } 2403 2404 int64x2_t test_vqrshlq_s64(int64x2_t a, int64x2_t b) { 2405 // CHECK: test_vqrshlq_s64 2406 return vqrshlq_s64(a, b); 2407 // CHECK: sqrshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2408 } 2409 2410 // CHECK: test_vqrshlq_u8 2411 uint8x16_t test_vqrshlq_u8(uint8x16_t a, int8x16_t b) { 2412 return vqrshlq_u8(a, b); 2413 // CHECK: uqrshl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2414 } 2415 2416 uint16x8_t test_vqrshlq_u16(uint16x8_t a, int16x8_t b) { 2417 // CHECK: test_vqrshlq_u16 2418 return vqrshlq_u16(a, b); 2419 // CHECK: uqrshl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2420 } 2421 2422 uint32x4_t test_vqrshlq_u32(uint32x4_t a, int32x4_t b) { 2423 // CHECK: test_vqrshlq_u32 2424 return vqrshlq_u32(a, b); 2425 // CHECK: uqrshl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2426 } 2427 2428 uint64x2_t test_vqrshlq_u64(uint64x2_t a, int64x2_t b) { 2429 // CHECK: test_vqrshlq_u64 2430 return vqrshlq_u64(a, b); 2431 // CHECK: uqrshl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2432 } 2433 2434 int8x8_t test_vmax_s8(int8x8_t a, int8x8_t b) { 2435 // CHECK: test_vmax_s8 2436 return vmax_s8(a, b); 2437 // CHECK: smax {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2438 } 2439 2440 int16x4_t test_vmax_s16(int16x4_t a, int16x4_t b) { 2441 // CHECK: test_vmax_s16 2442 return vmax_s16(a, b); 2443 // CHECK: smax {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2444 } 2445 2446 int32x2_t test_vmax_s32(int32x2_t a, int32x2_t b) { 2447 // CHECK: test_vmax_s32 2448 return vmax_s32(a, b); 2449 // CHECK: smax {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2450 } 2451 2452 uint8x8_t test_vmax_u8(uint8x8_t a, uint8x8_t b) { 2453 // CHECK: test_vmax_u8 2454 return vmax_u8(a, b); 2455 // CHECK: umax {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2456 } 2457 2458 uint16x4_t test_vmax_u16(uint16x4_t a, uint16x4_t b) { 2459 // CHECK: test_vmax_u16 2460 return vmax_u16(a, b); 2461 // CHECK: umax {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2462 } 2463 2464 uint32x2_t test_vmax_u32(uint32x2_t a, uint32x2_t b) { 2465 // CHECK: test_vmax_u32 2466 return vmax_u32(a, b); 2467 // CHECK: umax {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2468 } 2469 2470 float32x2_t test_vmax_f32(float32x2_t a, float32x2_t b) { 2471 // CHECK: test_vmax_f32 2472 return vmax_f32(a, b); 2473 // CHECK: fmax {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2474 } 2475 2476 int8x16_t test_vmaxq_s8(int8x16_t a, int8x16_t b) { 2477 // CHECK: test_vmaxq_s8 2478 return vmaxq_s8(a, b); 2479 // CHECK: smax {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2480 } 2481 2482 int16x8_t test_vmaxq_s16(int16x8_t a, int16x8_t b) { 2483 // CHECK: test_vmaxq_s16 2484 return vmaxq_s16(a, b); 2485 // CHECK: smax {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2486 } 2487 2488 int32x4_t test_vmaxq_s32(int32x4_t a, int32x4_t b) { 2489 // CHECK: test_vmaxq_s32 2490 return vmaxq_s32(a, b); 2491 // CHECK: smax {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2492 } 2493 2494 uint8x16_t test_vmaxq_u8(uint8x16_t a, uint8x16_t b) { 2495 // CHECK: test_vmaxq_u8 2496 return vmaxq_u8(a, b); 2497 // CHECK: umax {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2498 } 2499 2500 uint16x8_t test_vmaxq_u16(uint16x8_t a, uint16x8_t b) { 2501 // CHECK: test_vmaxq_u16 2502 return vmaxq_u16(a, b); 2503 // CHECK: umax {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2504 } 2505 2506 uint32x4_t test_vmaxq_u32(uint32x4_t a, uint32x4_t b) { 2507 // CHECK: test_vmaxq_u32 2508 return vmaxq_u32(a, b); 2509 // CHECK: umax {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2510 } 2511 2512 float32x4_t test_vmaxq_f32(float32x4_t a, float32x4_t b) { 2513 // CHECK: test_vmaxq_f32 2514 return vmaxq_f32(a, b); 2515 // CHECK: fmax {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2516 } 2517 2518 float64x2_t test_vmaxq_f64(float64x2_t a, float64x2_t b) { 2519 // CHECK: test_vmaxq_f64 2520 return vmaxq_f64(a, b); 2521 // CHECK: fmax {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2522 } 2523 2524 2525 int8x8_t test_vmin_s8(int8x8_t a, int8x8_t b) { 2526 // CHECK: test_vmin_s8 2527 return vmin_s8(a, b); 2528 // CHECK: smin {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2529 } 2530 2531 int16x4_t test_vmin_s16(int16x4_t a, int16x4_t b) { 2532 // CHECK: test_vmin_s16 2533 return vmin_s16(a, b); 2534 // CHECK: smin {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2535 } 2536 2537 int32x2_t test_vmin_s32(int32x2_t a, int32x2_t b) { 2538 // CHECK: test_vmin_s32 2539 return vmin_s32(a, b); 2540 // CHECK: smin {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2541 } 2542 2543 uint8x8_t test_vmin_u8(uint8x8_t a, uint8x8_t b) { 2544 // CHECK: test_vmin_u8 2545 return vmin_u8(a, b); 2546 // CHECK: umin {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2547 } 2548 2549 uint16x4_t test_vmin_u16(uint16x4_t a, uint16x4_t b) { 2550 // CHECK: test_vmin_u16 2551 return vmin_u16(a, b); 2552 // CHECK: umin {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2553 } 2554 2555 uint32x2_t test_vmin_u32(uint32x2_t a, uint32x2_t b) { 2556 // CHECK: test_vmin_u32 2557 return vmin_u32(a, b); 2558 // CHECK: umin {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2559 } 2560 2561 float32x2_t test_vmin_f32(float32x2_t a, float32x2_t b) { 2562 // CHECK: test_vmin_f32 2563 return vmin_f32(a, b); 2564 // CHECK: fmin {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2565 } 2566 2567 int8x16_t test_vminq_s8(int8x16_t a, int8x16_t b) { 2568 // CHECK: test_vminq_s8 2569 return vminq_s8(a, b); 2570 // CHECK: smin {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2571 } 2572 2573 int16x8_t test_vminq_s16(int16x8_t a, int16x8_t b) { 2574 // CHECK: test_vminq_s16 2575 return vminq_s16(a, b); 2576 // CHECK: smin {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2577 } 2578 2579 int32x4_t test_vminq_s32(int32x4_t a, int32x4_t b) { 2580 // CHECK: test_vminq_s32 2581 return vminq_s32(a, b); 2582 // CHECK: smin {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2583 } 2584 2585 uint8x16_t test_vminq_u8(uint8x16_t a, uint8x16_t b) { 2586 // CHECK: test_vminq_u8 2587 return vminq_u8(a, b); 2588 // CHECK: umin {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2589 } 2590 2591 uint16x8_t test_vminq_u16(uint16x8_t a, uint16x8_t b) { 2592 // CHECK: test_vminq_u16 2593 return vminq_u16(a, b); 2594 // CHECK: umin {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2595 } 2596 2597 uint32x4_t test_vminq_u32(uint32x4_t a, uint32x4_t b) { 2598 // CHECK: test_vminq_u32 2599 return vminq_u32(a, b); 2600 // CHECK: umin {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2601 } 2602 2603 float32x4_t test_vminq_f32(float32x4_t a, float32x4_t b) { 2604 // CHECK: test_vminq_f32 2605 return vminq_f32(a, b); 2606 // CHECK: fmin {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2607 } 2608 2609 float64x2_t test_vminq_f64(float64x2_t a, float64x2_t b) { 2610 // CHECK: test_vminq_f64 2611 return vminq_f64(a, b); 2612 // CHECK: fmin {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2613 } 2614 2615 float32x2_t test_vmaxnm_f32(float32x2_t a, float32x2_t b) { 2616 // CHECK: test_vmaxnm_f32 2617 return vmaxnm_f32(a, b); 2618 // CHECK: fmaxnm {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2619 } 2620 2621 float32x4_t test_vmaxnmq_f32(float32x4_t a, float32x4_t b) { 2622 // CHECK: test_vmaxnmq_f32 2623 return vmaxnmq_f32(a, b); 2624 // CHECK: fmaxnm {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2625 } 2626 2627 float64x2_t test_vmaxnmq_f64(float64x2_t a, float64x2_t b) { 2628 // CHECK: test_vmaxnmq_f64 2629 return vmaxnmq_f64(a, b); 2630 // CHECK: fmaxnm {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2631 } 2632 2633 float32x2_t test_vminnm_f32(float32x2_t a, float32x2_t b) { 2634 // CHECK: test_vminnm_f32 2635 return vminnm_f32(a, b); 2636 // CHECK: fminnm {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2637 } 2638 2639 float32x4_t test_vminnmq_f32(float32x4_t a, float32x4_t b) { 2640 // CHECK: test_vminnmq_f32 2641 return vminnmq_f32(a, b); 2642 // CHECK: fminnm {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2643 } 2644 2645 float64x2_t test_vminnmq_f64(float64x2_t a, float64x2_t b) { 2646 // CHECK: test_vminnmq_f64 2647 return vminnmq_f64(a, b); 2648 // CHECK: fminnm {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2649 } 2650 2651 int8x8_t test_vpmax_s8(int8x8_t a, int8x8_t b) { 2652 // CHECK: test_vpmax_s8 2653 return vpmax_s8(a, b); 2654 // CHECK: smaxp {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2655 } 2656 2657 int16x4_t test_vpmax_s16(int16x4_t a, int16x4_t b) { 2658 // CHECK: test_vpmax_s16 2659 return vpmax_s16(a, b); 2660 // CHECK: smaxp {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2661 } 2662 2663 int32x2_t test_vpmax_s32(int32x2_t a, int32x2_t b) { 2664 // CHECK: test_vpmax_s32 2665 return vpmax_s32(a, b); 2666 // CHECK: smaxp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2667 } 2668 2669 uint8x8_t test_vpmax_u8(uint8x8_t a, uint8x8_t b) { 2670 // CHECK: test_vpmax_u8 2671 return vpmax_u8(a, b); 2672 // CHECK: umaxp {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2673 } 2674 2675 uint16x4_t test_vpmax_u16(uint16x4_t a, uint16x4_t b) { 2676 // CHECK: test_vpmax_u16 2677 return vpmax_u16(a, b); 2678 // CHECK: umaxp {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2679 } 2680 2681 uint32x2_t test_vpmax_u32(uint32x2_t a, uint32x2_t b) { 2682 // CHECK: test_vpmax_u32 2683 return vpmax_u32(a, b); 2684 // CHECK: umaxp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2685 } 2686 2687 float32x2_t test_vpmax_f32(float32x2_t a, float32x2_t b) { 2688 // CHECK: test_vpmax_f32 2689 return vpmax_f32(a, b); 2690 // CHECK: fmaxp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2691 } 2692 2693 int8x16_t test_vpmaxq_s8(int8x16_t a, int8x16_t b) { 2694 // CHECK: test_vpmaxq_s8 2695 return vpmaxq_s8(a, b); 2696 // CHECK: smaxp {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2697 } 2698 2699 int16x8_t test_vpmaxq_s16(int16x8_t a, int16x8_t b) { 2700 // CHECK: test_vpmaxq_s16 2701 return vpmaxq_s16(a, b); 2702 // CHECK: smaxp {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2703 } 2704 2705 int32x4_t test_vpmaxq_s32(int32x4_t a, int32x4_t b) { 2706 // CHECK: test_vpmaxq_s32 2707 return vpmaxq_s32(a, b); 2708 // CHECK: smaxp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2709 } 2710 2711 uint8x16_t test_vpmaxq_u8(uint8x16_t a, uint8x16_t b) { 2712 // CHECK: test_vpmaxq_u8 2713 return vpmaxq_u8(a, b); 2714 // CHECK: umaxp {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2715 } 2716 2717 uint16x8_t test_vpmaxq_u16(uint16x8_t a, uint16x8_t b) { 2718 // CHECK: test_vpmaxq_u16 2719 return vpmaxq_u16(a, b); 2720 // CHECK: umaxp {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2721 } 2722 2723 uint32x4_t test_vpmaxq_u32(uint32x4_t a, uint32x4_t b) { 2724 // CHECK: test_vpmaxq_u32 2725 return vpmaxq_u32(a, b); 2726 // CHECK: umaxp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2727 } 2728 2729 float32x4_t test_vpmaxq_f32(float32x4_t a, float32x4_t b) { 2730 // CHECK: test_vpmaxq_f32 2731 return vpmaxq_f32(a, b); 2732 // CHECK: fmaxp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2733 } 2734 2735 float64x2_t test_vpmaxq_f64(float64x2_t a, float64x2_t b) { 2736 // CHECK: test_vpmaxq_f64 2737 return vpmaxq_f64(a, b); 2738 // CHECK: fmaxp {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2739 } 2740 2741 int8x8_t test_vpmin_s8(int8x8_t a, int8x8_t b) { 2742 // CHECK: test_vpmin_s8 2743 return vpmin_s8(a, b); 2744 // CHECK: sminp {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2745 } 2746 2747 int16x4_t test_vpmin_s16(int16x4_t a, int16x4_t b) { 2748 // CHECK: test_vpmin_s16 2749 return vpmin_s16(a, b); 2750 // CHECK: sminp {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2751 } 2752 2753 int32x2_t test_vpmin_s32(int32x2_t a, int32x2_t b) { 2754 // CHECK: test_vpmin_s32 2755 return vpmin_s32(a, b); 2756 // CHECK: sminp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2757 } 2758 2759 uint8x8_t test_vpmin_u8(uint8x8_t a, uint8x8_t b) { 2760 // CHECK: test_vpmin_u8 2761 return vpmin_u8(a, b); 2762 // CHECK: uminp {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2763 } 2764 2765 uint16x4_t test_vpmin_u16(uint16x4_t a, uint16x4_t b) { 2766 // CHECK: test_vpmin_u16 2767 return vpmin_u16(a, b); 2768 // CHECK: uminp {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2769 } 2770 2771 uint32x2_t test_vpmin_u32(uint32x2_t a, uint32x2_t b) { 2772 // CHECK: test_vpmin_u32 2773 return vpmin_u32(a, b); 2774 // CHECK: uminp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2775 } 2776 2777 float32x2_t test_vpmin_f32(float32x2_t a, float32x2_t b) { 2778 // CHECK: test_vpmin_f32 2779 return vpmin_f32(a, b); 2780 // CHECK: fminp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2781 } 2782 2783 int8x16_t test_vpminq_s8(int8x16_t a, int8x16_t b) { 2784 // CHECK: test_vpminq_s8 2785 return vpminq_s8(a, b); 2786 // CHECK: sminp {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2787 } 2788 2789 int16x8_t test_vpminq_s16(int16x8_t a, int16x8_t b) { 2790 // CHECK: test_vpminq_s16 2791 return vpminq_s16(a, b); 2792 // CHECK: sminp {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2793 } 2794 2795 int32x4_t test_vpminq_s32(int32x4_t a, int32x4_t b) { 2796 // CHECK: test_vpminq_s32 2797 return vpminq_s32(a, b); 2798 // CHECK: sminp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2799 } 2800 2801 uint8x16_t test_vpminq_u8(uint8x16_t a, uint8x16_t b) { 2802 // CHECK: test_vpminq_u8 2803 return vpminq_u8(a, b); 2804 // CHECK: uminp {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2805 } 2806 2807 uint16x8_t test_vpminq_u16(uint16x8_t a, uint16x8_t b) { 2808 // CHECK: test_vpminq_u16 2809 return vpminq_u16(a, b); 2810 // CHECK: uminp {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2811 } 2812 2813 uint32x4_t test_vpminq_u32(uint32x4_t a, uint32x4_t b) { 2814 // CHECK: test_vpminq_u32 2815 return vpminq_u32(a, b); 2816 // CHECK: uminp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2817 } 2818 2819 float32x4_t test_vpminq_f32(float32x4_t a, float32x4_t b) { 2820 // CHECK: test_vpminq_f32 2821 return vpminq_f32(a, b); 2822 // CHECK: fminp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2823 } 2824 2825 float64x2_t test_vpminq_f64(float64x2_t a, float64x2_t b) { 2826 // CHECK: test_vpminq_f64 2827 return vpminq_f64(a, b); 2828 // CHECK: fminp {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2829 } 2830 2831 float32x2_t test_vpmaxnm_f32(float32x2_t a, float32x2_t b) { 2832 // CHECK: test_vpmaxnm_f32 2833 return vpmaxnm_f32(a, b); 2834 // CHECK: fmaxnmp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2835 } 2836 2837 float32x4_t test_vpmaxnmq_f32(float32x4_t a, float32x4_t b) { 2838 // CHECK: test_vpmaxnmq_f32 2839 return vpmaxnmq_f32(a, b); 2840 // CHECK: fmaxnmp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2841 } 2842 2843 float64x2_t test_vpmaxnmq_f64(float64x2_t a, float64x2_t b) { 2844 // CHECK: test_vpmaxnmq_f64 2845 return vpmaxnmq_f64(a, b); 2846 // CHECK: fmaxnmp {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2847 } 2848 2849 float32x2_t test_vpminnm_f32(float32x2_t a, float32x2_t b) { 2850 // CHECK: test_vpminnm_f32 2851 return vpminnm_f32(a, b); 2852 // CHECK: fminnmp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2853 } 2854 2855 float32x4_t test_vpminnmq_f32(float32x4_t a, float32x4_t b) { 2856 // CHECK: test_vpminnmq_f32 2857 return vpminnmq_f32(a, b); 2858 // CHECK: fminnmp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2859 } 2860 2861 float64x2_t test_vpminnmq_f64(float64x2_t a, float64x2_t b) { 2862 // CHECK: test_vpminnmq_f64 2863 return vpminnmq_f64(a, b); 2864 // CHECK: fminnmp {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2865 } 2866 2867 int8x8_t test_vpadd_s8(int8x8_t a, int8x8_t b) { 2868 // CHECK: test_vpadd_s8 2869 return vpadd_s8(a, b); 2870 // CHECK: addp {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2871 } 2872 2873 int16x4_t test_vpadd_s16(int16x4_t a, int16x4_t b) { 2874 // CHECK: test_vpadd_s16 2875 return vpadd_s16(a, b); 2876 // CHECK: addp {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2877 } 2878 2879 int32x2_t test_vpadd_s32(int32x2_t a, int32x2_t b) { 2880 // CHECK: test_vpadd_s32 2881 return vpadd_s32(a, b); 2882 // CHECK: addp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2883 } 2884 2885 uint8x8_t test_vpadd_u8(uint8x8_t a, uint8x8_t b) { 2886 // CHECK: test_vpadd_u8 2887 return vpadd_u8(a, b); 2888 // CHECK: addp {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2889 } 2890 2891 uint16x4_t test_vpadd_u16(uint16x4_t a, uint16x4_t b) { 2892 // CHECK: test_vpadd_u16 2893 return vpadd_u16(a, b); 2894 // CHECK: addp {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2895 } 2896 2897 uint32x2_t test_vpadd_u32(uint32x2_t a, uint32x2_t b) { 2898 // CHECK: test_vpadd_u32 2899 return vpadd_u32(a, b); 2900 // CHECK: addp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2901 } 2902 2903 float32x2_t test_vpadd_f32(float32x2_t a, float32x2_t b) { 2904 // CHECK: test_vpadd_f32 2905 return vpadd_f32(a, b); 2906 // CHECK: faddp {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2907 } 2908 2909 int8x16_t test_vpaddq_s8(int8x16_t a, int8x16_t b) { 2910 // CHECK: test_vpaddq_s8 2911 return vpaddq_s8(a, b); 2912 // CHECK: addp {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2913 } 2914 2915 int16x8_t test_vpaddq_s16(int16x8_t a, int16x8_t b) { 2916 // CHECK: test_vpaddq_s16 2917 return vpaddq_s16(a, b); 2918 // CHECK: addp {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2919 } 2920 2921 int32x4_t test_vpaddq_s32(int32x4_t a, int32x4_t b) { 2922 // CHECK: test_vpaddq_s32 2923 return vpaddq_s32(a, b); 2924 // CHECK: addp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2925 } 2926 2927 uint8x16_t test_vpaddq_u8(uint8x16_t a, uint8x16_t b) { 2928 // CHECK: test_vpaddq_u8 2929 return vpaddq_u8(a, b); 2930 // CHECK: addp {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2931 } 2932 2933 uint16x8_t test_vpaddq_u16(uint16x8_t a, uint16x8_t b) { 2934 // CHECK: test_vpaddq_u16 2935 return vpaddq_u16(a, b); 2936 // CHECK: addp {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2937 } 2938 2939 uint32x4_t test_vpaddq_u32(uint32x4_t a, uint32x4_t b) { 2940 // CHECK: test_vpaddq_u32 2941 return vpaddq_u32(a, b); 2942 // CHECK: addp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2943 } 2944 2945 float32x4_t test_vpaddq_f32(float32x4_t a, float32x4_t b) { 2946 // CHECK: test_vpaddq_f32 2947 return vpaddq_f32(a, b); 2948 // CHECK: faddp {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2949 } 2950 2951 float64x2_t test_vpaddq_f64(float64x2_t a, float64x2_t b) { 2952 // CHECK: test_vpaddq_f64 2953 return vpaddq_f64(a, b); 2954 // CHECK: faddp {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 2955 } 2956 2957 int16x4_t test_vqdmulh_s16(int16x4_t a, int16x4_t b) { 2958 // CHECK: test_vqdmulh_s16 2959 return vqdmulh_s16(a, b); 2960 // CHECK: sqdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2961 } 2962 2963 int32x2_t test_vqdmulh_s32(int32x2_t a, int32x2_t b) { 2964 // CHECK: test_vqdmulh_s32 2965 return vqdmulh_s32(a, b); 2966 // CHECK: sqdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2967 } 2968 2969 int16x8_t test_vqdmulhq_s16(int16x8_t a, int16x8_t b) { 2970 // CHECK: test_vqdmulhq_s16 2971 return vqdmulhq_s16(a, b); 2972 // CHECK: sqdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2973 } 2974 2975 int32x4_t test_vqdmulhq_s32(int32x4_t a, int32x4_t b) { 2976 // CHECK: test_vqdmulhq_s32 2977 return vqdmulhq_s32(a, b); 2978 // CHECK: sqdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2979 } 2980 2981 int16x4_t test_vqrdmulh_s16(int16x4_t a, int16x4_t b) { 2982 // CHECK: test_vqrdmulh_s16 2983 return vqrdmulh_s16(a, b); 2984 // CHECK: sqrdmulh {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2985 } 2986 2987 int32x2_t test_vqrdmulh_s32(int32x2_t a, int32x2_t b) { 2988 // CHECK: test_vqrdmulh_s32 2989 return vqrdmulh_s32(a, b); 2990 // CHECK: sqrdmulh {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2991 } 2992 2993 int16x8_t test_vqrdmulhq_s16(int16x8_t a, int16x8_t b) { 2994 // CHECK: test_vqrdmulhq_s16 2995 return vqrdmulhq_s16(a, b); 2996 // CHECK: sqrdmulh {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2997 } 2998 2999 int32x4_t test_vqrdmulhq_s32(int32x4_t a, int32x4_t b) { 3000 // CHECK: test_vqrdmulhq_s32 3001 return vqrdmulhq_s32(a, b); 3002 // CHECK: sqrdmulh {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3003 } 3004 3005 3006 float32x2_t test_vmulx_f32(float32x2_t a, float32x2_t b) { 3007 // CHECK: test_vmulx_f32 3008 return vmulx_f32(a, b); 3009 // CHECK: fmulx {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 3010 } 3011 3012 float32x4_t test_vmulxq_f32(float32x4_t a, float32x4_t b) { 3013 // CHECK: test_vmulxq_f32 3014 return vmulxq_f32(a, b); 3015 // CHECK: fmulx {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3016 } 3017 3018 float64x2_t test_vmulxq_f64(float64x2_t a, float64x2_t b) { 3019 // CHECK: test_vmulxq_f64 3020 return vmulxq_f64(a, b); 3021 // CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 3022 } 3023 3024