1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle 7 * Copyright (c) 2000 by Silicon Graphics, Inc. 8 * Copyright (c) 2001 MIPS Technologies, Inc. 9 */ 10 #ifndef _ASM_STRING_H 11 #define _ASM_STRING_H 12 13 14 /* 15 * Most of the inline functions are rather naive implementations so I just 16 * didn't bother updating them for 64-bit ... 17 */ 18 #ifdef CONFIG_32BIT 19 20 #ifndef IN_STRING_C 21 22 #define __HAVE_ARCH_STRCPY 23 static __inline__ char *strcpy(char *__dest, __const__ char *__src) 24 { 25 char *__xdest = __dest; 26 27 __asm__ __volatile__( 28 ".set\tnoreorder\n\t" 29 ".set\tnoat\n" 30 "1:\tlbu\t$1,(%1)\n\t" 31 "addiu\t%1,1\n\t" 32 "sb\t$1,(%0)\n\t" 33 "bnez\t$1,1b\n\t" 34 "addiu\t%0,1\n\t" 35 ".set\tat\n\t" 36 ".set\treorder" 37 : "=r" (__dest), "=r" (__src) 38 : "0" (__dest), "1" (__src) 39 : "memory"); 40 41 return __xdest; 42 } 43 44 #define __HAVE_ARCH_STRNCPY 45 static __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n) 46 { 47 char *__xdest = __dest; 48 49 if (__n == 0) 50 return __xdest; 51 52 __asm__ __volatile__( 53 ".set\tnoreorder\n\t" 54 ".set\tnoat\n" 55 "1:\tlbu\t$1,(%1)\n\t" 56 "subu\t%2,1\n\t" 57 "sb\t$1,(%0)\n\t" 58 "beqz\t$1,2f\n\t" 59 "addiu\t%0,1\n\t" 60 "bnez\t%2,1b\n\t" 61 "addiu\t%1,1\n" 62 "2:\n\t" 63 ".set\tat\n\t" 64 ".set\treorder" 65 : "=r" (__dest), "=r" (__src), "=r" (__n) 66 : "0" (__dest), "1" (__src), "2" (__n) 67 : "memory"); 68 69 return __xdest; 70 } 71 72 #define __HAVE_ARCH_STRCMP 73 static __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct) 74 { 75 int __res; 76 77 __asm__ __volatile__( 78 ".set\tnoreorder\n\t" 79 ".set\tnoat\n\t" 80 "lbu\t%2,(%0)\n" 81 "1:\tlbu\t$1,(%1)\n\t" 82 "addiu\t%0,1\n\t" 83 "bne\t$1,%2,2f\n\t" 84 "addiu\t%1,1\n\t" 85 "bnez\t%2,1b\n\t" 86 "lbu\t%2,(%0)\n\t" 87 #if defined(CONFIG_CPU_R3000) 88 "nop\n\t" 89 #endif 90 "move\t%2,$1\n" 91 "2:\tsubu\t%2,$1\n" 92 "3:\t.set\tat\n\t" 93 ".set\treorder" 94 : "=r" (__cs), "=r" (__ct), "=r" (__res) 95 : "0" (__cs), "1" (__ct)); 96 97 return __res; 98 } 99 100 #endif /* !defined(IN_STRING_C) */ 101 102 #define __HAVE_ARCH_STRNCMP 103 static __inline__ int 104 strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count) 105 { 106 int __res; 107 108 __asm__ __volatile__( 109 ".set\tnoreorder\n\t" 110 ".set\tnoat\n" 111 "1:\tlbu\t%3,(%0)\n\t" 112 "beqz\t%2,2f\n\t" 113 "lbu\t$1,(%1)\n\t" 114 "subu\t%2,1\n\t" 115 "bne\t$1,%3,3f\n\t" 116 "addiu\t%0,1\n\t" 117 "bnez\t%3,1b\n\t" 118 "addiu\t%1,1\n" 119 "2:\n\t" 120 #if defined(CONFIG_CPU_R3000) 121 "nop\n\t" 122 #endif 123 "move\t%3,$1\n" 124 "3:\tsubu\t%3,$1\n\t" 125 ".set\tat\n\t" 126 ".set\treorder" 127 : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res) 128 : "0" (__cs), "1" (__ct), "2" (__count)); 129 130 return __res; 131 } 132 #endif /* CONFIG_32BIT */ 133 134 #define __HAVE_ARCH_MEMSET 135 extern void *memset(void *__s, int __c, size_t __count); 136 137 #define __HAVE_ARCH_MEMCPY 138 extern void *memcpy(void *__to, __const__ void *__from, size_t __n); 139 140 #define __HAVE_ARCH_MEMMOVE 141 extern void *memmove(void *__dest, __const__ void *__src, size_t __n); 142 143 #endif /* _ASM_STRING_H */ 144
