1 ; Test moves between FPRs and GPRs. 2 ; 3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5 declare i64 @foo() 6 declare double @bar() 7 @dptr = external global double 8 @iptr = external global i64 9 10 ; Test 32-bit moves from GPRs to FPRs. The GPR must be moved into the high 11 ; 32 bits of the FPR. 12 define float @f1(i32 %a) { 13 ; CHECK-LABEL: f1: 14 ; CHECK: sllg [[REGISTER:%r[0-5]]], %r2, 32 15 ; CHECK: ldgr %f0, [[REGISTER]] 16 %res = bitcast i32 %a to float 17 ret float %res 18 } 19 20 ; Like f1, but create a situation where the shift can be folded with 21 ; surrounding code. 22 define float @f2(i64 %big) { 23 ; CHECK-LABEL: f2: 24 ; CHECK: risbg [[REGISTER:%r[0-5]]], %r2, 0, 159, 31 25 ; CHECK: ldgr %f0, [[REGISTER]] 26 %shift = lshr i64 %big, 1 27 %a = trunc i64 %shift to i32 28 %res = bitcast i32 %a to float 29 ret float %res 30 } 31 32 ; Another example of the same thing. 33 define float @f3(i64 %big) { 34 ; CHECK-LABEL: f3: 35 ; CHECK: risbg [[REGISTER:%r[0-5]]], %r2, 0, 159, 2 36 ; CHECK: ldgr %f0, [[REGISTER]] 37 %shift = ashr i64 %big, 30 38 %a = trunc i64 %shift to i32 39 %res = bitcast i32 %a to float 40 ret float %res 41 } 42 43 ; Like f1, but the value to transfer is already in the high 32 bits. 44 define float @f4(i64 %big) { 45 ; CHECK-LABEL: f4: 46 ; CHECK-NOT: %r2 47 ; CHECK: nilf %r2, 0 48 ; CHECK-NOT: %r2 49 ; CHECK: ldgr %f0, %r2 50 %shift = ashr i64 %big, 32 51 %a = trunc i64 %shift to i32 52 %res = bitcast i32 %a to float 53 ret float %res 54 } 55 56 ; Test 64-bit moves from GPRs to FPRs. 57 define double @f5(i64 %a) { 58 ; CHECK-LABEL: f5: 59 ; CHECK: ldgr %f0, %r2 60 %res = bitcast i64 %a to double 61 ret double %res 62 } 63 64 ; Test 128-bit moves from GPRs to FPRs. i128 isn't a legitimate type, 65 ; so this goes through memory. 66 ; FIXME: it would be better to use one MVC here. 67 define void @f6(fp128 *%a, i128 *%b) { 68 ; CHECK-LABEL: f6: 69 ; CHECK: lg 70 ; CHECK: mvc 71 ; CHECK: stg 72 ; CHECK: br %r14 73 %val = load i128 *%b 74 %res = bitcast i128 %val to fp128 75 store fp128 %res, fp128 *%a 76 ret void 77 } 78 79 ; Test 32-bit moves from FPRs to GPRs. The high 32 bits of the FPR should 80 ; be moved into the low 32 bits of the GPR. 81 define i32 @f7(float %a) { 82 ; CHECK-LABEL: f7: 83 ; CHECK: lgdr [[REGISTER:%r[0-5]]], %f0 84 ; CHECK: srlg %r2, [[REGISTER]], 32 85 %res = bitcast float %a to i32 86 ret i32 %res 87 } 88 89 ; Test 64-bit moves from FPRs to GPRs. 90 define i64 @f8(double %a) { 91 ; CHECK-LABEL: f8: 92 ; CHECK: lgdr %r2, %f0 93 %res = bitcast double %a to i64 94 ret i64 %res 95 } 96 97 ; Test 128-bit moves from FPRs to GPRs, with the same restriction as f6. 98 define void @f9(fp128 *%a, i128 *%b) { 99 ; CHECK-LABEL: f9: 100 ; CHECK: ld 101 ; CHECK: ld 102 ; CHECK: std 103 ; CHECK: std 104 %val = load fp128 *%a 105 %res = bitcast fp128 %val to i128 106 store i128 %res, i128 *%b 107 ret void 108 } 109 110 ; Test cases where the destination of an LGDR needs to be spilled. 111 ; We shouldn't have any integer stack stores or floating-point loads. 112 define void @f10(double %extra) { 113 ; CHECK-LABEL: f10: 114 ; CHECK: dptr 115 ; CHECK-NOT: stg {{.*}}(%r15) 116 ; CHECK: %loop 117 ; CHECK-NOT: ld {{.*}}(%r15) 118 ; CHECK: %exit 119 ; CHECK: br %r14 120 entry: 121 %double0 = load volatile double *@dptr 122 %biased0 = fadd double %double0, %extra 123 %int0 = bitcast double %biased0 to i64 124 %double1 = load volatile double *@dptr 125 %biased1 = fadd double %double1, %extra 126 %int1 = bitcast double %biased1 to i64 127 %double2 = load volatile double *@dptr 128 %biased2 = fadd double %double2, %extra 129 %int2 = bitcast double %biased2 to i64 130 %double3 = load volatile double *@dptr 131 %biased3 = fadd double %double3, %extra 132 %int3 = bitcast double %biased3 to i64 133 %double4 = load volatile double *@dptr 134 %biased4 = fadd double %double4, %extra 135 %int4 = bitcast double %biased4 to i64 136 %double5 = load volatile double *@dptr 137 %biased5 = fadd double %double5, %extra 138 %int5 = bitcast double %biased5 to i64 139 %double6 = load volatile double *@dptr 140 %biased6 = fadd double %double6, %extra 141 %int6 = bitcast double %biased6 to i64 142 %double7 = load volatile double *@dptr 143 %biased7 = fadd double %double7, %extra 144 %int7 = bitcast double %biased7 to i64 145 %double8 = load volatile double *@dptr 146 %biased8 = fadd double %double8, %extra 147 %int8 = bitcast double %biased8 to i64 148 %double9 = load volatile double *@dptr 149 %biased9 = fadd double %double9, %extra 150 %int9 = bitcast double %biased9 to i64 151 br label %loop 152 153 loop: 154 %start = call i64 @foo() 155 %or0 = or i64 %start, %int0 156 %or1 = or i64 %or0, %int1 157 %or2 = or i64 %or1, %int2 158 %or3 = or i64 %or2, %int3 159 %or4 = or i64 %or3, %int4 160 %or5 = or i64 %or4, %int5 161 %or6 = or i64 %or5, %int6 162 %or7 = or i64 %or6, %int7 163 %or8 = or i64 %or7, %int8 164 %or9 = or i64 %or8, %int9 165 store i64 %or9, i64 *@iptr 166 %cont = icmp ne i64 %start, 1 167 br i1 %cont, label %loop, label %exit 168 169 exit: 170 ret void 171 } 172 173 ; ...likewise LDGR, with the requirements the other way around. 174 define void @f11(i64 %mask) { 175 ; CHECK-LABEL: f11: 176 ; CHECK: iptr 177 ; CHECK-NOT: std {{.*}}(%r15) 178 ; CHECK: %loop 179 ; CHECK-NOT: lg {{.*}}(%r15) 180 ; CHECK: %exit 181 ; CHECK: br %r14 182 entry: 183 %int0 = load volatile i64 *@iptr 184 %masked0 = and i64 %int0, %mask 185 %double0 = bitcast i64 %masked0 to double 186 %int1 = load volatile i64 *@iptr 187 %masked1 = and i64 %int1, %mask 188 %double1 = bitcast i64 %masked1 to double 189 %int2 = load volatile i64 *@iptr 190 %masked2 = and i64 %int2, %mask 191 %double2 = bitcast i64 %masked2 to double 192 %int3 = load volatile i64 *@iptr 193 %masked3 = and i64 %int3, %mask 194 %double3 = bitcast i64 %masked3 to double 195 %int4 = load volatile i64 *@iptr 196 %masked4 = and i64 %int4, %mask 197 %double4 = bitcast i64 %masked4 to double 198 %int5 = load volatile i64 *@iptr 199 %masked5 = and i64 %int5, %mask 200 %double5 = bitcast i64 %masked5 to double 201 %int6 = load volatile i64 *@iptr 202 %masked6 = and i64 %int6, %mask 203 %double6 = bitcast i64 %masked6 to double 204 %int7 = load volatile i64 *@iptr 205 %masked7 = and i64 %int7, %mask 206 %double7 = bitcast i64 %masked7 to double 207 %int8 = load volatile i64 *@iptr 208 %masked8 = and i64 %int8, %mask 209 %double8 = bitcast i64 %masked8 to double 210 %int9 = load volatile i64 *@iptr 211 %masked9 = and i64 %int9, %mask 212 %double9 = bitcast i64 %masked9 to double 213 br label %loop 214 215 loop: 216 %start = call double @bar() 217 %add0 = fadd double %start, %double0 218 %add1 = fadd double %add0, %double1 219 %add2 = fadd double %add1, %double2 220 %add3 = fadd double %add2, %double3 221 %add4 = fadd double %add3, %double4 222 %add5 = fadd double %add4, %double5 223 %add6 = fadd double %add5, %double6 224 %add7 = fadd double %add6, %double7 225 %add8 = fadd double %add7, %double8 226 %add9 = fadd double %add8, %double9 227 store double %add9, double *@dptr 228 %cont = fcmp one double %start, 1.0 229 br i1 %cont, label %loop, label %exit 230 231 exit: 232 ret void 233 } 234 235 ; Test cases where the source of an LDGR needs to be spilled. 236 ; We shouldn't have any integer stack stores or floating-point loads. 237 define void @f12() { 238 ; CHECK-LABEL: f12: 239 ; CHECK: %loop 240 ; CHECK-NOT: std {{.*}}(%r15) 241 ; CHECK: %exit 242 ; CHECK: foo@PLT 243 ; CHECK-NOT: lg {{.*}}(%r15) 244 ; CHECK: foo@PLT 245 ; CHECK: br %r14 246 entry: 247 br label %loop 248 249 loop: 250 %int0 = phi i64 [ 0, %entry ], [ %add0, %loop ] 251 %int1 = phi i64 [ 0, %entry ], [ %add1, %loop ] 252 %int2 = phi i64 [ 0, %entry ], [ %add2, %loop ] 253 %int3 = phi i64 [ 0, %entry ], [ %add3, %loop ] 254 %int4 = phi i64 [ 0, %entry ], [ %add4, %loop ] 255 %int5 = phi i64 [ 0, %entry ], [ %add5, %loop ] 256 %int6 = phi i64 [ 0, %entry ], [ %add6, %loop ] 257 %int7 = phi i64 [ 0, %entry ], [ %add7, %loop ] 258 %int8 = phi i64 [ 0, %entry ], [ %add8, %loop ] 259 %int9 = phi i64 [ 0, %entry ], [ %add9, %loop ] 260 261 %bias = call i64 @foo() 262 %add0 = add i64 %int0, %bias 263 %add1 = add i64 %int1, %bias 264 %add2 = add i64 %int2, %bias 265 %add3 = add i64 %int3, %bias 266 %add4 = add i64 %int4, %bias 267 %add5 = add i64 %int5, %bias 268 %add6 = add i64 %int6, %bias 269 %add7 = add i64 %int7, %bias 270 %add8 = add i64 %int8, %bias 271 %add9 = add i64 %int9, %bias 272 %cont = icmp ne i64 %bias, 1 273 br i1 %cont, label %loop, label %exit 274 275 exit: 276 %unused1 = call i64 @foo() 277 %factor = load volatile double *@dptr 278 279 %conv0 = bitcast i64 %add0 to double 280 %mul0 = fmul double %conv0, %factor 281 store volatile double %mul0, double *@dptr 282 %conv1 = bitcast i64 %add1 to double 283 %mul1 = fmul double %conv1, %factor 284 store volatile double %mul1, double *@dptr 285 %conv2 = bitcast i64 %add2 to double 286 %mul2 = fmul double %conv2, %factor 287 store volatile double %mul2, double *@dptr 288 %conv3 = bitcast i64 %add3 to double 289 %mul3 = fmul double %conv3, %factor 290 store volatile double %mul3, double *@dptr 291 %conv4 = bitcast i64 %add4 to double 292 %mul4 = fmul double %conv4, %factor 293 store volatile double %mul4, double *@dptr 294 %conv5 = bitcast i64 %add5 to double 295 %mul5 = fmul double %conv5, %factor 296 store volatile double %mul5, double *@dptr 297 %conv6 = bitcast i64 %add6 to double 298 %mul6 = fmul double %conv6, %factor 299 store volatile double %mul6, double *@dptr 300 %conv7 = bitcast i64 %add7 to double 301 %mul7 = fmul double %conv7, %factor 302 store volatile double %mul7, double *@dptr 303 %conv8 = bitcast i64 %add8 to double 304 %mul8 = fmul double %conv8, %factor 305 store volatile double %mul8, double *@dptr 306 %conv9 = bitcast i64 %add9 to double 307 %mul9 = fmul double %conv9, %factor 308 store volatile double %mul9, double *@dptr 309 310 %unused2 = call i64 @foo() 311 312 ret void 313 } 314 315 ; ...likewise LGDR, with the requirements the other way around. 316 define void @f13() { 317 ; CHECK-LABEL: f13: 318 ; CHECK: %loop 319 ; CHECK-NOT: stg {{.*}}(%r15) 320 ; CHECK: %exit 321 ; CHECK: foo@PLT 322 ; CHECK-NOT: ld {{.*}}(%r15) 323 ; CHECK: foo@PLT 324 ; CHECK: br %r14 325 entry: 326 br label %loop 327 328 loop: 329 %double0 = phi double [ 1.0, %entry ], [ %mul0, %loop ] 330 %double1 = phi double [ 1.0, %entry ], [ %mul1, %loop ] 331 %double2 = phi double [ 1.0, %entry ], [ %mul2, %loop ] 332 %double3 = phi double [ 1.0, %entry ], [ %mul3, %loop ] 333 %double4 = phi double [ 1.0, %entry ], [ %mul4, %loop ] 334 %double5 = phi double [ 1.0, %entry ], [ %mul5, %loop ] 335 %double6 = phi double [ 1.0, %entry ], [ %mul6, %loop ] 336 %double7 = phi double [ 1.0, %entry ], [ %mul7, %loop ] 337 %double8 = phi double [ 1.0, %entry ], [ %mul8, %loop ] 338 %double9 = phi double [ 1.0, %entry ], [ %mul9, %loop ] 339 340 %factor = call double @bar() 341 %mul0 = fmul double %double0, %factor 342 %mul1 = fmul double %double1, %factor 343 %mul2 = fmul double %double2, %factor 344 %mul3 = fmul double %double3, %factor 345 %mul4 = fmul double %double4, %factor 346 %mul5 = fmul double %double5, %factor 347 %mul6 = fmul double %double6, %factor 348 %mul7 = fmul double %double7, %factor 349 %mul8 = fmul double %double8, %factor 350 %mul9 = fmul double %double9, %factor 351 %cont = fcmp one double %factor, 1.0 352 br i1 %cont, label %loop, label %exit 353 354 exit: 355 %unused1 = call i64 @foo() 356 %bias = load volatile i64 *@iptr 357 358 %conv0 = bitcast double %mul0 to i64 359 %add0 = add i64 %conv0, %bias 360 store volatile i64 %add0, i64 *@iptr 361 %conv1 = bitcast double %mul1 to i64 362 %add1 = add i64 %conv1, %bias 363 store volatile i64 %add1, i64 *@iptr 364 %conv2 = bitcast double %mul2 to i64 365 %add2 = add i64 %conv2, %bias 366 store volatile i64 %add2, i64 *@iptr 367 %conv3 = bitcast double %mul3 to i64 368 %add3 = add i64 %conv3, %bias 369 store volatile i64 %add3, i64 *@iptr 370 %conv4 = bitcast double %mul4 to i64 371 %add4 = add i64 %conv4, %bias 372 store volatile i64 %add4, i64 *@iptr 373 %conv5 = bitcast double %mul5 to i64 374 %add5 = add i64 %conv5, %bias 375 store volatile i64 %add5, i64 *@iptr 376 %conv6 = bitcast double %mul6 to i64 377 %add6 = add i64 %conv6, %bias 378 store volatile i64 %add6, i64 *@iptr 379 %conv7 = bitcast double %mul7 to i64 380 %add7 = add i64 %conv7, %bias 381 store volatile i64 %add7, i64 *@iptr 382 %conv8 = bitcast double %mul8 to i64 383 %add8 = add i64 %conv8, %bias 384 store volatile i64 %add8, i64 *@iptr 385 %conv9 = bitcast double %mul9 to i64 386 %add9 = add i64 %conv9, %bias 387 store volatile i64 %add9, i64 *@iptr 388 389 %unused2 = call i64 @foo() 390 391 ret void 392 } 393
