1 ; Test the handling of base + index + displacement addresses for large frames, 2 ; in cases where both 12-bit and 20-bit displacements are allowed. 3 ; 4 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck -check-prefix=CHECK-NOFP %s 5 ; RUN: llc < %s -mtriple=s390x-linux-gnu -disable-fp-elim | FileCheck -check-prefix=CHECK-FP %s 6 7 ; This file tests what happens when a displacement is converted from 8 ; being relative to the start of a frame object to being relative to 9 ; the frame itself. In some cases the test is only possible if two 10 ; objects are allocated. 11 ; 12 ; Rather than rely on a particular order for those objects, the tests 13 ; instead allocate two objects of the same size and apply the test to 14 ; both of them. For consistency, all tests follow this model, even if 15 ; one object would actually be enough. 16 17 ; First check the highest offset that is in range of the 12-bit form. 18 ; 19 ; The last in-range doubleword offset is 4088. Since the frame has two 20 ; emergency spill slots at 160(%r15), the amount that we need to allocate 21 ; in order to put another object at offset 4088 is 4088 - 176 = 3912 bytes. 22 define void @f1(i8 %byte) { 23 ; CHECK-NOFP-LABEL: f1: 24 ; CHECK-NOFP: stc %r2, 4095(%r15) 25 ; CHECK-NOFP: br %r14 26 ; 27 ; CHECK-FP-LABEL: f1: 28 ; CHECK-FP: stc %r2, 4095(%r11) 29 ; CHECK-FP: br %r14 30 %region1 = alloca [3912 x i8], align 8 31 %region2 = alloca [3912 x i8], align 8 32 %ptr1 = getelementptr inbounds [3912 x i8]* %region1, i64 0, i64 7 33 %ptr2 = getelementptr inbounds [3912 x i8]* %region2, i64 0, i64 7 34 store volatile i8 %byte, i8 *%ptr1 35 store volatile i8 %byte, i8 *%ptr2 36 ret void 37 } 38 39 ; Test the first offset that is out-of-range of the 12-bit form. 40 define void @f2(i8 %byte) { 41 ; CHECK-NOFP-LABEL: f2: 42 ; CHECK-NOFP: stcy %r2, 4096(%r15) 43 ; CHECK-NOFP: br %r14 44 ; 45 ; CHECK-FP-LABEL: f2: 46 ; CHECK-FP: stcy %r2, 4096(%r11) 47 ; CHECK-FP: br %r14 48 %region1 = alloca [3912 x i8], align 8 49 %region2 = alloca [3912 x i8], align 8 50 %ptr1 = getelementptr inbounds [3912 x i8]* %region1, i64 0, i64 8 51 %ptr2 = getelementptr inbounds [3912 x i8]* %region2, i64 0, i64 8 52 store volatile i8 %byte, i8 *%ptr1 53 store volatile i8 %byte, i8 *%ptr2 54 ret void 55 } 56 57 ; Test the last offset that is in range of the 20-bit form. 58 ; 59 ; The last in-range doubleword offset is 524280, so by the same reasoning 60 ; as above, we need to allocate objects of 524280 - 176 = 524104 bytes. 61 define void @f3(i8 %byte) { 62 ; CHECK-NOFP-LABEL: f3: 63 ; CHECK-NOFP: stcy %r2, 524287(%r15) 64 ; CHECK-NOFP: br %r14 65 ; 66 ; CHECK-FP-LABEL: f3: 67 ; CHECK-FP: stcy %r2, 524287(%r11) 68 ; CHECK-FP: br %r14 69 %region1 = alloca [524104 x i8], align 8 70 %region2 = alloca [524104 x i8], align 8 71 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 7 72 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 7 73 store volatile i8 %byte, i8 *%ptr1 74 store volatile i8 %byte, i8 *%ptr2 75 ret void 76 } 77 78 ; Test the first out-of-range offset. We can't use an index register here, 79 ; and the offset is also out of LAY's range, so expect a constant load 80 ; followed by an addition. 81 define void @f4(i8 %byte) { 82 ; CHECK-NOFP-LABEL: f4: 83 ; CHECK-NOFP: llilh %r1, 8 84 ; CHECK-NOFP: stc %r2, 0(%r1,%r15) 85 ; CHECK-NOFP: br %r14 86 ; 87 ; CHECK-FP-LABEL: f4: 88 ; CHECK-FP: llilh %r1, 8 89 ; CHECK-FP: stc %r2, 0(%r1,%r11) 90 ; CHECK-FP: br %r14 91 %region1 = alloca [524104 x i8], align 8 92 %region2 = alloca [524104 x i8], align 8 93 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 94 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 95 store volatile i8 %byte, i8 *%ptr1 96 store volatile i8 %byte, i8 *%ptr2 97 ret void 98 } 99 100 ; Add 4095 to the previous offset, to test the other end of the STC range. 101 ; The instruction will actually be STCY before frame lowering. 102 define void @f5(i8 %byte) { 103 ; CHECK-NOFP-LABEL: f5: 104 ; CHECK-NOFP: llilh %r1, 8 105 ; CHECK-NOFP: stc %r2, 4095(%r1,%r15) 106 ; CHECK-NOFP: br %r14 107 ; 108 ; CHECK-FP-LABEL: f5: 109 ; CHECK-FP: llilh %r1, 8 110 ; CHECK-FP: stc %r2, 4095(%r1,%r11) 111 ; CHECK-FP: br %r14 112 %region1 = alloca [524104 x i8], align 8 113 %region2 = alloca [524104 x i8], align 8 114 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 4103 115 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 4103 116 store volatile i8 %byte, i8 *%ptr1 117 store volatile i8 %byte, i8 *%ptr2 118 ret void 119 } 120 121 ; Test the next offset after that, which uses STCY instead of STC. 122 define void @f6(i8 %byte) { 123 ; CHECK-NOFP-LABEL: f6: 124 ; CHECK-NOFP: llilh %r1, 8 125 ; CHECK-NOFP: stcy %r2, 4096(%r1,%r15) 126 ; CHECK-NOFP: br %r14 127 ; 128 ; CHECK-FP-LABEL: f6: 129 ; CHECK-FP: llilh %r1, 8 130 ; CHECK-FP: stcy %r2, 4096(%r1,%r11) 131 ; CHECK-FP: br %r14 132 %region1 = alloca [524104 x i8], align 8 133 %region2 = alloca [524104 x i8], align 8 134 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 4104 135 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 4104 136 store volatile i8 %byte, i8 *%ptr1 137 store volatile i8 %byte, i8 *%ptr2 138 ret void 139 } 140 141 ; Now try an offset of 524287 from the start of the object, with the 142 ; object being at offset 1048576 (1 << 20). The backend prefers to create 143 ; anchors 0x10000 bytes apart, so that the high part can be loaded using 144 ; LLILH while still using STC in more cases than 0x40000 anchors would. 145 define void @f7(i8 %byte) { 146 ; CHECK-NOFP-LABEL: f7: 147 ; CHECK-NOFP: llilh %r1, 23 148 ; CHECK-NOFP: stcy %r2, 65535(%r1,%r15) 149 ; CHECK-NOFP: br %r14 150 ; 151 ; CHECK-FP-LABEL: f7: 152 ; CHECK-FP: llilh %r1, 23 153 ; CHECK-FP: stcy %r2, 65535(%r1,%r11) 154 ; CHECK-FP: br %r14 155 %region1 = alloca [1048400 x i8], align 8 156 %region2 = alloca [1048400 x i8], align 8 157 %ptr1 = getelementptr inbounds [1048400 x i8]* %region1, i64 0, i64 524287 158 %ptr2 = getelementptr inbounds [1048400 x i8]* %region2, i64 0, i64 524287 159 store volatile i8 %byte, i8 *%ptr1 160 store volatile i8 %byte, i8 *%ptr2 161 ret void 162 } 163 164 ; Keep the object-relative offset the same but bump the size of the 165 ; objects by one doubleword. 166 define void @f8(i8 %byte) { 167 ; CHECK-NOFP-LABEL: f8: 168 ; CHECK-NOFP: llilh %r1, 24 169 ; CHECK-NOFP: stc %r2, 7(%r1,%r15) 170 ; CHECK-NOFP: br %r14 171 ; 172 ; CHECK-FP-LABEL: f8: 173 ; CHECK-FP: llilh %r1, 24 174 ; CHECK-FP: stc %r2, 7(%r1,%r11) 175 ; CHECK-FP: br %r14 176 %region1 = alloca [1048408 x i8], align 8 177 %region2 = alloca [1048408 x i8], align 8 178 %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524287 179 %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524287 180 store volatile i8 %byte, i8 *%ptr1 181 store volatile i8 %byte, i8 *%ptr2 182 ret void 183 } 184 185 ; Check a case where the original displacement is out of range. The backend 186 ; should force separate address logic from the outset. We don't yet do any 187 ; kind of anchor optimization, so there should be no offset on the STC itself. 188 ; 189 ; Before frame lowering this is an LA followed by the AGFI seen below. 190 ; The LA then gets lowered into the LLILH/LA form. The exact sequence 191 ; isn't that important though. 192 define void @f9(i8 %byte) { 193 ; CHECK-NOFP-LABEL: f9: 194 ; CHECK-NOFP: llilh [[R1:%r[1-5]]], 16 195 ; CHECK-NOFP: la [[R2:%r[1-5]]], 8([[R1]],%r15) 196 ; CHECK-NOFP: agfi [[R2]], 524288 197 ; CHECK-NOFP: stc %r2, 0([[R2]]) 198 ; CHECK-NOFP: br %r14 199 ; 200 ; CHECK-FP-LABEL: f9: 201 ; CHECK-FP: llilh [[R1:%r[1-5]]], 16 202 ; CHECK-FP: la [[R2:%r[1-5]]], 8([[R1]],%r11) 203 ; CHECK-FP: agfi [[R2]], 524288 204 ; CHECK-FP: stc %r2, 0([[R2]]) 205 ; CHECK-FP: br %r14 206 %region1 = alloca [1048408 x i8], align 8 207 %region2 = alloca [1048408 x i8], align 8 208 %ptr1 = getelementptr inbounds [1048408 x i8]* %region1, i64 0, i64 524288 209 %ptr2 = getelementptr inbounds [1048408 x i8]* %region2, i64 0, i64 524288 210 store volatile i8 %byte, i8 *%ptr1 211 store volatile i8 %byte, i8 *%ptr2 212 ret void 213 } 214 215 ; Repeat f4 in a case that needs the emergency spill slots (because all 216 ; call-clobbered registers are live and no call-saved ones have been 217 ; allocated). 218 define void @f10(i32 *%vptr, i8 %byte) { 219 ; CHECK-NOFP-LABEL: f10: 220 ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) 221 ; CHECK-NOFP: llilh [[REGISTER]], 8 222 ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) 223 ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) 224 ; CHECK-NOFP: br %r14 225 ; 226 ; CHECK-FP-LABEL: f10: 227 ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) 228 ; CHECK-FP: llilh [[REGISTER]], 8 229 ; CHECK-FP: stc %r3, 0([[REGISTER]],%r11) 230 ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) 231 ; CHECK-FP: br %r14 232 %i0 = load volatile i32 *%vptr 233 %i1 = load volatile i32 *%vptr 234 %i4 = load volatile i32 *%vptr 235 %i5 = load volatile i32 *%vptr 236 %region1 = alloca [524104 x i8], align 8 237 %region2 = alloca [524104 x i8], align 8 238 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 239 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 240 store volatile i8 %byte, i8 *%ptr1 241 store volatile i8 %byte, i8 *%ptr2 242 store volatile i32 %i0, i32 *%vptr 243 store volatile i32 %i1, i32 *%vptr 244 store volatile i32 %i4, i32 *%vptr 245 store volatile i32 %i5, i32 *%vptr 246 ret void 247 } 248 249 ; And again with maximum register pressure. The only spill slots that the 250 ; NOFP case needs are the emergency ones, so the offsets are the same as for f4. 251 ; However, the FP case uses %r11 as the frame pointer and must therefore 252 ; spill a second register. This leads to an extra displacement of 8. 253 define void @f11(i32 *%vptr, i8 %byte) { 254 ; CHECK-NOFP-LABEL: f11: 255 ; CHECK-NOFP: stmg %r6, %r15, 256 ; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15) 257 ; CHECK-NOFP: llilh [[REGISTER]], 8 258 ; CHECK-NOFP: stc %r3, 0([[REGISTER]],%r15) 259 ; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15) 260 ; CHECK-NOFP: lmg %r6, %r15, 261 ; CHECK-NOFP: br %r14 262 ; 263 ; CHECK-FP-LABEL: f11: 264 ; CHECK-FP: stmg %r6, %r15, 265 ; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11) 266 ; CHECK-FP: llilh [[REGISTER]], 8 267 ; CHECK-FP: stc %r3, 8([[REGISTER]],%r11) 268 ; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11) 269 ; CHECK-FP: lmg %r6, %r15, 270 ; CHECK-FP: br %r14 271 %i0 = load volatile i32 *%vptr 272 %i1 = load volatile i32 *%vptr 273 %i4 = load volatile i32 *%vptr 274 %i5 = load volatile i32 *%vptr 275 %i6 = load volatile i32 *%vptr 276 %i7 = load volatile i32 *%vptr 277 %i8 = load volatile i32 *%vptr 278 %i9 = load volatile i32 *%vptr 279 %i10 = load volatile i32 *%vptr 280 %i11 = load volatile i32 *%vptr 281 %i12 = load volatile i32 *%vptr 282 %i13 = load volatile i32 *%vptr 283 %i14 = load volatile i32 *%vptr 284 %region1 = alloca [524104 x i8], align 8 285 %region2 = alloca [524104 x i8], align 8 286 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 8 287 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 8 288 store volatile i8 %byte, i8 *%ptr1 289 store volatile i8 %byte, i8 *%ptr2 290 store volatile i32 %i0, i32 *%vptr 291 store volatile i32 %i1, i32 *%vptr 292 store volatile i32 %i4, i32 *%vptr 293 store volatile i32 %i5, i32 *%vptr 294 store volatile i32 %i6, i32 *%vptr 295 store volatile i32 %i7, i32 *%vptr 296 store volatile i32 %i8, i32 *%vptr 297 store volatile i32 %i9, i32 *%vptr 298 store volatile i32 %i10, i32 *%vptr 299 store volatile i32 %i11, i32 *%vptr 300 store volatile i32 %i12, i32 *%vptr 301 store volatile i32 %i13, i32 *%vptr 302 store volatile i32 %i14, i32 *%vptr 303 ret void 304 } 305 306 ; Repeat f4 in a case where the index register is already occupied. 307 define void @f12(i8 %byte, i64 %index) { 308 ; CHECK-NOFP-LABEL: f12: 309 ; CHECK-NOFP: llilh %r1, 8 310 ; CHECK-NOFP: agr %r1, %r15 311 ; CHECK-NOFP: stc %r2, 0(%r3,%r1) 312 ; CHECK-NOFP: br %r14 313 ; 314 ; CHECK-FP-LABEL: f12: 315 ; CHECK-FP: llilh %r1, 8 316 ; CHECK-FP: agr %r1, %r11 317 ; CHECK-FP: stc %r2, 0(%r3,%r1) 318 ; CHECK-FP: br %r14 319 %region1 = alloca [524104 x i8], align 8 320 %region2 = alloca [524104 x i8], align 8 321 %index1 = add i64 %index, 8 322 %ptr1 = getelementptr inbounds [524104 x i8]* %region1, i64 0, i64 %index1 323 %ptr2 = getelementptr inbounds [524104 x i8]* %region2, i64 0, i64 %index1 324 store volatile i8 %byte, i8 *%ptr1 325 store volatile i8 %byte, i8 *%ptr2 326 ret void 327 } 328
