1 ; RUN: opt < %s -instcombine -disable-output 2 3 ; SimplifyDemandedBits should cope with pointer types. 4 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 6 target triple = "x86_64-unknown-linux-gnu" 7 %struct.VEC_rtx_base = type { i32, i32, [1 x %struct.rtx_def*] } 8 %struct.VEC_rtx_gc = type { %struct.VEC_rtx_base } 9 %struct.block_symbol = type { [3 x %struct.rtunion], %struct.object_block*, i64 } 10 %struct.object_block = type { %struct.section*, i32, i64, %struct.VEC_rtx_gc*, %struct.VEC_rtx_gc* } 11 %struct.omp_clause_subcode = type { i32 } 12 %struct.rtunion = type { i8* } 13 %struct.rtx_def = type { i16, i8, i8, %struct.u } 14 %struct.section = type { %struct.unnamed_section } 15 %struct.u = type { %struct.block_symbol } 16 %struct.unnamed_section = type { %struct.omp_clause_subcode, void (i8*)*, i8*, %struct.section* } 17 18 define fastcc void @cse_insn(%struct.rtx_def* %insn, %struct.rtx_def* %libcall_insn) nounwind { 19 entry: 20 br i1 undef, label %bb43, label %bb88 21 22 bb43: ; preds = %entry 23 br label %bb88 24 25 bb88: ; preds = %bb43, %entry 26 br i1 undef, label %bb95, label %bb107 27 28 bb95: ; preds = %bb88 29 unreachable 30 31 bb107: ; preds = %bb88 32 %0 = load i16* undef, align 8 ; <i16> [#uses=1] 33 %1 = icmp eq i16 %0, 38 ; <i1> [#uses=1] 34 %src_eqv_here.0 = select i1 %1, %struct.rtx_def* null, %struct.rtx_def* null ; <%struct.rtx_def*> [#uses=1] 35 br i1 undef, label %bb127, label %bb125 36 37 bb125: ; preds = %bb107 38 br i1 undef, label %bb127, label %bb126 39 40 bb126: ; preds = %bb125 41 br i1 undef, label %bb129, label %bb133 42 43 bb127: ; preds = %bb125, %bb107 44 unreachable 45 46 bb129: ; preds = %bb126 47 br label %bb133 48 49 bb133: ; preds = %bb129, %bb126 50 br i1 undef, label %bb134, label %bb146 51 52 bb134: ; preds = %bb133 53 unreachable 54 55 bb146: ; preds = %bb133 56 br i1 undef, label %bb180, label %bb186 57 58 bb180: ; preds = %bb146 59 %2 = icmp eq %struct.rtx_def* null, null ; <i1> [#uses=1] 60 %3 = zext i1 %2 to i8 ; <i8> [#uses=1] 61 %4 = icmp ne %struct.rtx_def* %src_eqv_here.0, null ; <i1> [#uses=1] 62 %5 = zext i1 %4 to i8 ; <i8> [#uses=1] 63 %toBool181 = icmp ne i8 %3, 0 ; <i1> [#uses=1] 64 %toBool182 = icmp ne i8 %5, 0 ; <i1> [#uses=1] 65 %6 = and i1 %toBool181, %toBool182 ; <i1> [#uses=1] 66 %7 = zext i1 %6 to i8 ; <i8> [#uses=1] 67 %toBool183 = icmp ne i8 %7, 0 ; <i1> [#uses=1] 68 br i1 %toBool183, label %bb184, label %bb186 69 70 bb184: ; preds = %bb180 71 br i1 undef, label %bb185, label %bb186 72 73 bb185: ; preds = %bb184 74 br label %bb186 75 76 bb186: ; preds = %bb185, %bb184, %bb180, %bb146 77 br i1 undef, label %bb190, label %bb195 78 79 bb190: ; preds = %bb186 80 unreachable 81 82 bb195: ; preds = %bb186 83 unreachable 84 } 85
