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      1 ;//
      2 ;//
      3 ;// File Name:  omxVCM4P2_FindMVpred_s.s
      4 ;// OpenMAX DL: v1.0.2
      5 ;// Revision:   12290
      6 ;// Date:       Wednesday, April 9, 2008
      7 ;//
      8 ;// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved.
      9 ;//
     10 ;//
     11 ;//
     12 
     13 ;// Function:
     14 ;//     omxVCM4P2_FindMVpred
     15 ;//
     16         ;// Include headers
     17         INCLUDE omxtypes_s.h
     18         INCLUDE armCOMM_s.h
     19         INCLUDE armVCCOMM_s.h
     20 
     21         ;// Define cpu variants
     22         M_VARIANTS CortexA8
     23 
     24 
     25         IF CortexA8
     26 
     27         M_TABLE armVCM4P2_pBlkIndexTable
     28         DCD  OMXVCBlk0, OMXVCBlk1
     29         DCD  OMXVCBlk2, OMXVCBlk3
     30 
     31 ;//--------------------------------------------
     32 ;// Declare input registers
     33 ;//--------------------------------------------
     34 
     35 pSrcMVCurMB            RN 0
     36 pSrcCandMV1            RN 1
     37 pSrcCandMV2            RN 2
     38 pSrcCandMV3            RN 3
     39 pDstMVPred             RN 4
     40 pDstMVPredME           RN 5
     41 iBlk                   RN 6
     42 
     43 pTable                 RN 4
     44 CandMV                 RN 12
     45 
     46 pCandMV1               RN 7
     47 pCandMV2               RN 8
     48 pCandMV3               RN 9
     49 
     50 CandMV1dx              RN 0
     51 CandMV1dy              RN 1
     52 CandMV2dx              RN 2
     53 CandMV2dy              RN 3
     54 CandMV3dx              RN 10
     55 CandMV3dy              RN 11
     56 
     57 temp                   RN 14
     58 
     59 zero                   RN 14
     60 return                 RN 0
     61 
     62 ; ----------------------------------------------
     63 ; Main routine
     64 ; ----------------------------------------------
     65 
     66         M_ALLOC4 MV, 4
     67 
     68         ;// Function header
     69         M_START omxVCM4P2_FindMVpred, r11
     70 
     71         ;// Define stack arguments
     72         M_ARG   ppDstMVPred,  4
     73         M_ARG   ppDstMVPredME, 4
     74         M_ARG   Blk, 4
     75 
     76         M_ADR CandMV, MV
     77         MOV   zero, #0
     78         M_LDR iBlk, Blk
     79 
     80         ;// Set the default value for these
     81         ;// to be used if pSrcCandMV[1|2|3] == NULL
     82         MOV   pCandMV1, CandMV
     83         MOV   pCandMV2, CandMV
     84         MOV   pCandMV3, CandMV
     85 
     86         STR   zero, [CandMV]
     87 
     88         ;// Branch to the case based on blk number
     89         M_SWITCH iBlk
     90         M_CASE   OMXVCBlk0      ;// iBlk=0
     91         M_CASE   OMXVCBlk1      ;// iBlk=0
     92         M_CASE   OMXVCBlk2      ;// iBlk=0
     93         M_CASE   OMXVCBlk3      ;// iBlk=0
     94         M_ENDSWITCH
     95 
     96 OMXVCBlk0
     97         CMP   pSrcCandMV1, #0
     98         ADDNE pCandMV1, pSrcCandMV1, #4
     99 
    100         CMP   pSrcCandMV2, #0
    101         ADDNE pCandMV2, pSrcCandMV2, #8
    102 
    103         CMP   pSrcCandMV3, #0
    104         ADDNE pCandMV3, pSrcCandMV3, #8
    105         CMPEQ pSrcCandMV1, #0
    106 
    107         MOVEQ pCandMV3, pCandMV2
    108         MOVEQ pCandMV1, pCandMV2
    109 
    110         CMP   pSrcCandMV1, #0
    111         CMPEQ pSrcCandMV2, #0
    112 
    113         MOVEQ pCandMV1, pCandMV3
    114         MOVEQ pCandMV2, pCandMV3
    115 
    116         CMP   pSrcCandMV2, #0
    117         CMPEQ pSrcCandMV3, #0
    118 
    119         MOVEQ pCandMV2, pCandMV1
    120         MOVEQ pCandMV3, pCandMV1
    121 
    122         B     BlkEnd
    123 
    124 OMXVCBlk1
    125         MOV   pCandMV1, pSrcMVCurMB
    126         CMP   pSrcCandMV3, #0
    127         ADDNE pCandMV3, pSrcCandMV3, #8
    128 
    129         CMP   pSrcCandMV2, #0
    130         ADDNE pCandMV2, pSrcCandMV2, #12
    131 
    132         CMPEQ pSrcCandMV3, #0
    133 
    134         MOVEQ pCandMV2, pCandMV1
    135         MOVEQ pCandMV3, pCandMV1
    136 
    137         B     BlkEnd
    138 
    139 OMXVCBlk2
    140         CMP   pSrcCandMV1, #0
    141         MOV   pCandMV2, pSrcMVCurMB
    142         ADD   pCandMV3, pSrcMVCurMB, #4
    143         ADDNE pCandMV1, pSrcCandMV1, #12
    144         B     BlkEnd
    145 
    146 OMXVCBlk3
    147         ADD   pCandMV1, pSrcMVCurMB, #8
    148         MOV   pCandMV2, pSrcMVCurMB
    149         ADD   pCandMV3, pSrcMVCurMB, #4
    150 
    151 BlkEnd
    152 
    153         ;// Using the transperancy info, zero
    154         ;// out the candidate MV if neccesary
    155         LDRSH CandMV1dx, [pCandMV1], #2
    156         LDRSH CandMV2dx, [pCandMV2], #2
    157         LDRSH CandMV3dx, [pCandMV3], #2
    158 
    159         ;// Load argument from the stack
    160         M_LDR pDstMVPredME, ppDstMVPredME
    161 
    162         LDRSH CandMV1dy, [pCandMV1]
    163         LDRSH CandMV2dy, [pCandMV2]
    164         LDRSH CandMV3dy, [pCandMV3]
    165 
    166         CMP pDstMVPredME, #0
    167 
    168         ;// Store the candidate MV's into the pDstMVPredME,
    169         ;// these can be used in the fast algorithm if implemented
    170 
    171         STRHNE CandMV1dx, [pDstMVPredME], #2
    172         STRHNE CandMV1dy, [pDstMVPredME], #2
    173         STRHNE CandMV2dx, [pDstMVPredME], #2
    174         STRHNE CandMV2dy, [pDstMVPredME], #2
    175         STRHNE CandMV3dx, [pDstMVPredME], #2
    176         STRHNE CandMV3dy, [pDstMVPredME]
    177 
    178         ; Find the median of the 3 candidate MV's
    179         M_MEDIAN3 CandMV1dx, CandMV2dx, CandMV3dx, temp
    180 
    181         ;// Load argument from the stack
    182         M_LDR pDstMVPred, ppDstMVPred
    183 
    184         M_MEDIAN3 CandMV1dy, CandMV2dy, CandMV3dy, temp
    185 
    186         STRH CandMV3dx, [pDstMVPred], #2
    187         STRH CandMV3dy, [pDstMVPred]
    188 
    189         MOV return, #OMX_Sts_NoErr
    190 
    191         M_END
    192     ENDIF ;// ARM1136JS :LOR: CortexA8
    193 
    194     END