Lines Matching refs:r_src
25 LIR* X86Mir2Lir::OpFpRegCopy(int r_dest, int r_src) {
28 DCHECK_EQ(X86_DOUBLEREG(r_dest), X86_DOUBLEREG(r_src));
33 if (X86_SINGLEREG(r_src)) {
39 DCHECK(X86_SINGLEREG(r_src));
44 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest, r_src);
45 if (r_dest == r_src) {
269 LIR* X86Mir2Lir::OpRegRegImm(OpKind op, int r_dest, int r_src,
273 return NewLIR3(opcode, r_dest, r_src, value);
275 if (value == 0xFF && r_src < 4) {
276 return NewLIR2(kX86Movzx8RR, r_dest, r_src);
278 return NewLIR2(kX86Movzx16RR, r_dest, r_src);
281 if (r_dest != r_src) {
285 r_src /* index */, value /* scale */, 0 /* disp */);
287 return NewLIR5(kX86Lea32RA, r_dest, r_src /* base */,
290 OpRegCopy(r_dest, r_src);
463 int displacement, int r_src, int r_src_hi, OpSize size,
475 if (X86_FPREG(r_src)) {
477 if (X86_SINGLEREG(r_src)) {
479 DCHECK_EQ(r_src, (r_src_hi - 1));
480 r_src = S2d(r_src, r_src_hi);
482 r_src_hi = r_src + 1;
493 if (X86_FPREG(r_src)) {
495 DCHECK(X86_SINGLEREG(r_src));
514 store = NewLIR3(opcode, rBase, displacement + LOWORD_OFFSET, r_src);
516 store = NewLIR3(opcode, rBase, displacement + LOWORD_OFFSET, r_src);
530 displacement + LOWORD_OFFSET, r_src);
533 displacement + LOWORD_OFFSET, r_src);
543 LIR* X86Mir2Lir::StoreBaseIndexed(int rBase, int r_index, int r_src,
546 r_src, INVALID_REG, size, INVALID_SREG);
550 int r_src, OpSize size) {
552 displacement, r_src, INVALID_REG, size,
