Lines Matching refs:Op
72 ICToken Op = PostfixStack.pop_back_val();
73 assert ((Op.first == IC_IMM || Op.first == IC_REGISTER)
75 return Op.second;
77 void pushOperand(InfixCalculatorTok Op, int64_t Val = 0) {
78 assert ((Op == IC_IMM || Op == IC_REGISTER) &&
80 PostfixStack.push_back(std::make_pair(Op, Val));
84 void pushOperator(InfixCalculatorTok Op) {
87 InfixOperatorStack.push_back(Op);
96 if (OpPrecedence[Op] > OpPrecedence[StackOp] || StackOp == IC_LPAREN) {
97 InfixOperatorStack.push_back(Op);
111 if (!(OpPrecedence[StackOp] >= OpPrecedence[Op] || ParenCount))
131 InfixOperatorStack.push_back(Op);
146 ICToken Op = PostfixStack[i];
147 if (Op.first == IC_IMM || Op.first == IC_REGISTER) {
148 OperandStack.push_back(Op);
154 switch (Op.first) {
530 bool isSrcOp(X86Operand &Op);
534 bool isDstOp(X86Operand &Op);
1009 bool X86AsmParser::isSrcOp(X86Operand &Op) {
1012 return (Op.isMem() &&
1013 (Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::DS) &&
1014 isa<MCConstantExpr>(Op.Mem.Disp) &&
1015 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
1016 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0);
1019 bool X86AsmParser::isDstOp(X86Operand &Op) {
1022 return Op.isMem() &&
1023 (Op.Mem.SegReg == 0 || Op.Mem.SegReg == X86::ES) &&
1024 isa<MCConstantExpr>(Op.Mem.Disp) &&
1025 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
1026 Op.Mem.BaseReg == basereg && Op.Mem.IndexReg == 0;
1951 if (X86Operand *Op = ParseOperand())
1952 Operands.push_back(Op);
1962 if (X86Operand *Op = ParseOperand())
1963 Operands.push_back(Op);
1990 X86Operand &Op = *(X86Operand*)Operands.back();
1991 if (Op.isMem() && Op.Mem.SegReg == 0 &&
1992 isa<MCConstantExpr>(Op.Mem.Disp) &&
1993 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
1994 Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
1995 SMLoc Loc = Op.getEndLoc();
1996 Operands.back() = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
1997 delete &Op;
2003 X86Operand &Op = *(X86Operand*)Operands.begin()[1];
2004 if (Op.isMem() && Op.Mem.SegReg == 0 &&
2005 isa<MCConstantExpr>(Op.Mem.Disp) &&
2006 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 &&
2007 Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) {
2008 SMLoc Loc = Op.getEndLoc();
2009 Operands.begin()[1] = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc);
2010 delete &Op;
2016 X86Operand &Op = *(X86Operand*)Operands.begin()[1];
2018 if (Op.isReg() && Op.getReg() == X86::DX && isDstOp(Op2)) {
2021 delete &Op;
2029 X86Operand &Op = *(X86Operand*)Operands.begin()[1];
2031 if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) {
2034 delete &Op;
2043 X86Operand &Op = *(X86Operand*)Operands.begin()[1];
2045 if (isSrcOp(Op) && isDstOp(Op2)) {
2048 delete &Op;
2113 // FIXME: Hack to handle recognize s{hr,ar,hl} $1, <op>. Canonicalize to
2114 // "shift <op>".
2231 X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
2232 assert(Op->isToken() && "Leading operand should always be a mnemonic!");
2239 if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" ||
2240 Op->getToken() == "fstsww" || Op->getToken() == "fstcww" ||
2241 Op->getToken() == "finit" || Op->getToken() == "fsave" ||
2242 Op->getToken() == "fstenv" || Op->getToken() == "fclex") {
2250 StringSwitch<const char*>(Op->getToken())
2314 StringRef Base = Op->getToken();
2318 Op->setTokenValue(Tmp.str());
2359 Op->setTokenValue(Base);
2410 Op->getLocRange();
