| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
78 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
89 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo)
[all...] |
| LegalizeVectorOps.cpp | 328 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
335 return DAG.getNode(ISD::BITCAST, dl, VT, Op);
616 // Bitcast the operands to be the same type as the mask.
619 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1);
620 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2);
629 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val);
683 // Bitcast the operands to be the same type as the mask.
686 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1);
687 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2);
696 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val)
[all...] |
| LegalizeVectorTypes.cpp | 50 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
151 return DAG.getNode(ISD::BITCAST, SDLoc(N),
366 case ISD::BITCAST:
405 return DAG.getNode(ISD::BITCAST, SDLoc(N),
501 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
641 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
642 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
650 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
651 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
665 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo)
[all...] |
| SelectionDAGBuilder.cpp | 135 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
136 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
168 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
169 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
211 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
287 // Vector/Vector bitcast.
289 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
300 // Trivial bitcast if the types are the same size and the destination
304 return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
376 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val)
[all...] |
| LegalizeDAG.cpp | 322 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val);
445 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad);
744 Value = DAG.getNode(ISD::BITCAST, dl, NVT, Value);
[all...] |
| LegalizeFloatTypes.cpp | 61 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N); break;
609 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
636 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
[all...] |
| DAGCombiner.cpp | [all...] |
| FastISel.cpp | 133 !(I->getOpcode() == Instruction::BitCast ||
770 // If the bitcast doesn't change the type, just use the operand value.
779 // Bitcasts of other values become reg-reg copies or BITCAST operators.
796 // First, try to perform the bitcast by inserting a reg-reg copy.
809 // If the reg-reg copy failed, select a BITCAST opcode.
811 ResultReg = FastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill);
[all...] |
| SelectionDAGDumper.cpp | 225 case ISD::BITCAST: return "bitcast";
|
| LegalizeTypes.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 53 case ISD::BITCAST: Res = PromoteIntRes_BITCAST(N); break;
220 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
235 // For example, i32 = BITCAST v2i16 on alpha. Convert the split
249 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
254 // make us bitcast between two vectors which are legalized in different ways.
256 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
780 case ISD::BITCAST: Res = PromoteIntOp_BITCAST(N); break;
[all...] |
| SelectionDAG.cpp | 99 if (N->getOpcode() == ISD::BITCAST)
147 if (N->getOpcode() == ISD::BITCAST)
[all...] |
| TargetLowering.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 413 /// BITCAST - This operator converts between integer, vector and FP
420 BITCAST,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 397 setOperationAction(ISD::BITCAST , MVT::f32 , Expand);
398 setOperationAction(ISD::BITCAST , MVT::i32 , Expand);
400 setOperationAction(ISD::BITCAST , MVT::f64 , Expand);
402 setOperationAction(ISD::BITCAST , MVT::i64 , Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 389 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
397 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Arg);
444 WholeValue = DAG.getNode(ISD::BITCAST, dl, MVT::f64, WholeValue);
740 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| MipsSEISelLowering.cpp | 53 setOperationAction(ISD::BITCAST, VecTys[i], Legal);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 223 setOperationAction(ISD::BITCAST, MVT::f32, Expand);
224 setOperationAction(ISD::BITCAST, MVT::i32, Expand);
225 setOperationAction(ISD::BITCAST, MVT::i64, Expand);
226 setOperationAction(ISD::BITCAST, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 871 // Bitcast True / False to the correct types. This will end up being
875 True = DAG.getNode(ISD::BITCAST, DL, CompareVT, True);
876 False = DAG.getNode(ISD::BITCAST, DL, CompareVT, False);
904 return DAG.getNode(ISD::BITCAST, DL, VT, SelectNode);
[all...] |
| AMDGPUISelDAGToDAG.cpp | 494 case ISD::BITCAST:
|
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 236 setOperationAction(ISD::BITCAST, MVT::i32, Custom);
237 setOperationAction(ISD::BITCAST, MVT::f32, Custom);
[all...] |
