/art/compiler/dex/quick/arm/ |
assemble_arm.cc | 121 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF_SP | REG_USE_SP, 125 kFmtUnused, -1, -1, IS_UNARY_OP | REG_DEF_SP | REG_USE_SP, 323 IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF_LIST0 328 IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE_LIST0 391 IS_UNARY_OP | REG_DEF_SP | REG_USE_SP, [all...] |
target_arm.cc | 128 if (flags & REG_DEF_SP) {
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/dalvik/vm/compiler/codegen/mips/ |
CodegenCommon.cpp | 179 if (flags & REG_DEF_SP) {
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MipsLIR.h | 524 #define REG_DEF_SP (1 << kRegDefSP)
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/dalvik/vm/compiler/codegen/arm/ |
Assemble.cpp | 122 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF_SP | REG_USE_SP, 126 kFmtUnused, -1, -1, IS_UNARY_OP | REG_DEF_SP | REG_USE_SP, 324 IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF_LIST0 329 IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE_LIST0 392 IS_UNARY_OP | REG_DEF_SP | REG_USE_SP, [all...] |
ArmLIR.h | 680 #define REG_DEF_SP (1 << kRegDefSP) [all...] |
CodegenCommon.cpp | 161 if (flags & REG_DEF_SP) {
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/art/compiler/dex/quick/x86/ |
target_x86.cc | 145 if (flags & REG_DEF_SP) {
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/art/compiler/dex/quick/mips/ |
target_mips.cc | 129 if (flags & REG_DEF_SP) {
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/art/compiler/dex/quick/ |
mir_to_lir.h | 57 #define REG_DEF_SP (1ULL << kRegDefSP) [all...] |