| /art/compiler/dex/quick/ |
| gen_loadstore.cc | 172 LIR* def_end; local
207 def_end = last_lir_insn_;
210 MarkDef(rl_dest, def_start, def_end);
239 LIR* def_end; local
284 def_end = last_lir_insn_;
285 MarkDefWide(rl_dest, def_start, def_end);
|
| ralloc_util.cc | 68 reinterpret_cast<uintptr_t>(p[i].def_end));
88 p[i].def_end = NULL;
529 p->def_end = finish;
544 p->def_end = finish;
555 info_lo->def_end = NULL;
560 info_hi->def_end = NULL;
572 NullifyRange(p->def_start, p->def_end, p->s_reg, rl.s_reg_low);
583 NullifyRange(p_low->def_start, p_low->def_end, p_low->s_reg, rl.s_reg_low);
736 DCHECK(reg_pool_->core_regs[i].def_end == NULL);
[all...] |
| mir_to_lir-inl.h | 33 p->def_end = NULL;
|
| mir_to_lir.h | 209 LIR *def_end; // Ending inst in last def sequence. member in struct:art::Mir2Lir::RegisterInfo
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | 206 /// def_iterator/def_begin/def_end - Walk all defs of the specified register.
211 static def_iterator def_end() { return def_iterator(0); } function in class:llvm::MachineRegisterInfo
215 bool def_empty(unsigned RegNo) const { return def_begin(RegNo) == def_end(); }
221 if (DI == def_end())
223 return ++DI == def_end();
|
| /external/llvm/lib/CodeGen/ |
| MachineRegisterInfo.cpp | 306 assert((I.atEnd() || llvm::next(I) == def_end()) &&
317 if (llvm::next(I) != def_end())
|
| LiveRangeCalc.cpp | 45 I = MRI->def_begin(Reg), E = MRI->def_end(); I != E; ++I) {
|
| PHIElimination.cpp | 202 DE = MRI->def_end(); DI != DE; ++DI)
|
| TwoAddressInstructionPass.cpp | 420 if (llvm::next(Begin) != MRI->def_end())
[all...] |
| MachineVerifier.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| R600OptimizeVectorRegisters.cpp | 50 E = MRI.def_end(); It != E; ++It) {
329 E = MRI->def_end(); It != E; ++It) {
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
