/art/compiler/dex/quick/mips/ |
utility_mips.cc | 182 case kOpLsl: 225 case kOpLsl: 307 res = OpRegRegImm(kOpLsl, r_dest_src1, r_src2, 24); 315 res = OpRegRegImm(kOpLsl, r_dest_src1, r_src2, 16); 355 first = OpRegRegImm(kOpLsl, t_reg, r_index, scale); 407 first = OpRegRegImm(kOpLsl, t_reg, r_index, scale);
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int_mips.cc | 290 OpRegRegImm(kOpLsl, t_reg, rl_src.low_reg, second_bit - first_bit); 294 OpRegRegImm(kOpLsl, rl_result.low_reg, rl_result.low_reg, first_bit); 447 OpRegRegImm(kOpLsl, r_new_index, rl_index.low_reg, scale); 527 OpRegRegImm(kOpLsl, r_new_index, rl_index.low_reg, scale);
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/art/compiler/dex/quick/x86/ |
utility_x86.cc | 132 case kOpLsl: opcode = kX86Sal32RI; break; 167 case kOpLsl: opcode = kX86Sal32RC; src2_must_be_cx = true; break; 227 return OpRegImm(kOpLsl, r_dest, 1); 248 case kOpLsl: case kOpLsr: case kOpAsr: case kOpRor: { 282 if (false && op == kOpLsl && value >= 0 && value <= 3) { // lea shift special case
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int_x86.cc | 271 OpRegRegImm(kOpLsl, t_reg, rl_src.low_reg, second_bit - first_bit); 275 OpRegRegImm(kOpLsl, rl_result.low_reg, rl_result.low_reg, first_bit);
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/dalvik/vm/compiler/codegen/arm/Thumb/ |
Factory.cpp | 328 case kOpLsl: 425 case kOpLsl: 440 res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 24); 444 res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 16); 448 res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 16); 479 first = opRegRegImm(cUnit, kOpLsl, rNewIndex, rIndex, scale); 521 first = opRegRegImm(cUnit, kOpLsl, rNewIndex, rIndex, scale);
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Gen.cpp | 282 opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, lit);
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/dalvik/vm/compiler/codegen/mips/Mips32/ |
Factory.cpp | 257 case kOpLsl: 301 case kOpLsl: 389 res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 24); 397 res = opRegRegImm(cUnit, kOpLsl, rDestSrc1, rSrc2, 16); 443 first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale); 506 first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale);
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/dalvik/vm/compiler/codegen/arm/Thumb2/ |
Gen.cpp | 253 opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner 310 opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner 453 opRegRegImm(cUnit, kOpLsl, rlResult.lowReg, rlResult.lowReg, firstBit);
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Factory.cpp | 371 case kOpLsl: 463 case kOpLsl: 511 case kOpLsl: [all...] |
/art/compiler/dex/ |
compiler_enums.h | 163 kOpLsl,
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/art/compiler/dex/quick/arm/ |
call_arm.cc | 477 OpRegImm(kOpLsl, r2, LW_LOCK_OWNER_SHIFT); 513 OpRegImm(kOpLsl, r2, LW_LOCK_OWNER_SHIFT);
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int_arm.cc | 582 OpRegRegImm(kOpLsl, rl_result.low_reg, rl_result.low_reg, first_bit); [all...] |
utility_arm.cc | 296 case kOpLsl: 389 case kOpLsl: 433 case kOpLsl:
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/art/compiler/dex/quick/ |
gen_common.cc | [all...] |
/dalvik/vm/compiler/codegen/arm/ |
ArmLIR.h | 175 kOpLsl, [all...] |
CodegenDriver.cpp | 443 opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale); 521 opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale); 838 op = kOpLsl; [all...] |
/dalvik/vm/compiler/codegen/mips/ |
MipsLIR.h | 207 kOpLsl,
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CodegenDriver.cpp | 495 opRegRegImm(cUnit, kOpLsl, regPtr, rlIndex.lowReg, scale); 566 opRegRegImm(cUnit, kOpLsl, tReg, rlIndex.lowReg, scale); 891 op = kOpLsl; [all...] |
/art/compiler/dex/portable/ |
mir_to_gbc.cc | 382 case kOpLsl: res = irb_->CreateShl(src1, src2); break; [all...] |