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    Searched refs:new_reg (Results 1 - 6 of 6) sorted by null

  /external/pixman/pixman/
pixman-region.c 632 #define COALESCE(new_reg, prev_band, cur_band) \
635 if (cur_band - prev_band == new_reg->data->numRects - cur_band) \
636 prev_band = pixman_coalesce (new_reg, prev_band, cur_band); \
698 #define APPEND_REGIONS(new_reg, r, r_end) \
703 RECTALLOC_BAIL (new_reg, new_rects, bail); \
704 memmove ((char *)PIXREGION_TOP (new_reg), (char *)r, \
706 new_reg->data->numRects += new_rects; \
748 pixman_op (region_type_t * new_reg, /* Place to store result */
767 region_data_type_t *old_data; /* Old data for new_reg */
769 * previous band in new_reg */
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pixman.h 453 pixman_bool_t pixman_region_intersect (pixman_region16_t *new_reg,
456 pixman_bool_t pixman_region_union (pixman_region16_t *new_reg,
474 pixman_bool_t pixman_region_inverse (pixman_region16_t *new_reg,
548 pixman_bool_t pixman_region32_intersect (pixman_region32_t *new_reg,
551 pixman_bool_t pixman_region32_union (pixman_region32_t *new_reg,
569 pixman_bool_t pixman_region32_inverse (pixman_region32_t *new_reg,
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
SIAssignInterpRegs.cpp 112 unsigned new_reg = AMDGPU::VReg_32RegClass.getRegister(used_vgprs); local
115 AddLiveIn(&MF, MRI, new_reg, virt_reg);
  /external/mesa3d/src/gallium/drivers/radeon/
SIAssignInterpRegs.cpp 112 unsigned new_reg = AMDGPU::VReg_32RegClass.getRegister(used_vgprs); local
115 AddLiveIn(&MF, MRI, new_reg, virt_reg);
  /art/compiler/dex/quick/
ralloc_util.cc 705 void Mir2Lir::CopyRegInfo(int new_reg, int old_reg) {
706 RegisterInfo* new_info = GetRegInfo(new_reg);
713 new_info->reg = new_reg;
883 int new_reg; local
893 new_reg = AllocTypedTemp(loc.fp, reg_class);
894 OpRegCopy(new_reg, loc.low_reg);
895 CopyRegInfo(new_reg, loc.low_reg);
897 loc.low_reg = new_reg;
904 new_reg = AllocTypedTemp(loc.fp, reg_class);
905 loc.low_reg = new_reg;
    [all...]
mir_to_lir.h 363 void CopyRegInfo(int new_reg, int old_reg);
    [all...]

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