| /art/compiler/dex/quick/arm/ |
| fp_arm.cc | 24 RegLocation rl_src1, RegLocation rl_src2) {
52 CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(pFmodf), rl_src1, rl_src2, local
64 rl_src2 = LoadValue(rl_src2, kFPReg);
66 NewLIR3(op, rl_result.low_reg, rl_src1.low_reg, rl_src2.low_reg);
71 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
95 CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(pFmod), rl_src1, rl_src2, local
109 rl_src2 = LoadValueWide(rl_src2, kFPReg);
110 DCHECK(rl_src2.wide)
181 RegLocation rl_src2; local
[all...] |
| int_arm.cc | 87 RegLocation rl_src2) {
91 rl_src2 = LoadValueWide(rl_src2, kCoreReg);
94 OpRegReg(kOpCmp, rl_src1.high_reg, rl_src2.high_reg);
97 OpRegRegReg(kOpSub, t_reg, rl_src1.low_reg, rl_src2.low_reg);
249 RegLocation rl_src2 = mir_graph_->GetSrcWide(mir, 2); local
254 rl_src1 = rl_src2;
255 rl_src2 = rl_temp;
258 if (rl_src2.is_const) {
259 RegLocation rl_temp = UpdateLocWide(rl_src2);
483 RegLocation rl_src2 = info->args[1]; local
[all...] |
| codegen_arm.h | 87 RegLocation rl_src1, RegLocation rl_src2);
96 void GenMulLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
97 void GenAddLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
98 void GenAndLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
100 RegLocation rl_src1, RegLocation rl_src2);
102 RegLocation rl_src1, RegLocation rl_src2);
104 RegLocation rl_src2);
110 void GenOrLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
111 void GenSubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
112 void GenXorLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
[all...] |
| /art/compiler/dex/quick/x86/ |
| fp_x86.cc | 24 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
52 CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(pFmodf), rl_src1, rl_src2, local
64 rl_src2 = LoadValue(rl_src2, kFPReg);
68 int r_src2 = rl_src2.low_reg;
79 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
103 CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(pFmod), rl_src1, rl_src2, local
116 rl_src2 = LoadValueWide(rl_src2, kFPReg);
117 DCHECK(rl_src2.wide)
291 RegLocation rl_src2; local
[all...] |
| int_x86.cc | 47 RegLocation rl_src2) {
51 LoadValueDirectWideFixed(rl_src2, r2, r3);
171 RegLocation rl_src2 = mir_graph_->GetSrcWide(mir, 2); local
175 LoadValueDirectWideFixed(rl_src2, r2, r3);
222 RegLocation rl_src2 = info->args[1]; local
224 rl_src2 = LoadValue(rl_src2, kCoreReg);
227 OpRegReg(kOpCmp, rl_src1.low_reg, rl_src2.low_reg);
233 OpRegReg(kOpMov, rl_result.low_reg, rl_src2.low_reg);
310 RegLocation rl_src2) {
[all...] |
| codegen_x86.h | 88 RegLocation rl_src1, RegLocation rl_src2);
97 void GenMulLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
98 void GenAddLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
99 void GenAndLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
101 RegLocation rl_src1, RegLocation rl_src2);
103 RegLocation rl_src1, RegLocation rl_src2);
105 RegLocation rl_src2);
111 void GenOrLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
112 void GenSubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
113 void GenXorLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
[all...] |
| /art/compiler/dex/quick/mips/ |
| fp_mips.cc | 25 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
53 CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(pFmodf), rl_src1, rl_src2, local
65 rl_src2 = LoadValue(rl_src2, kFPReg);
67 NewLIR3(op, rl_result.low_reg, rl_src1.low_reg, rl_src2.low_reg);
72 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
96 CallRuntimeHelperRegLocationRegLocation(QUICK_ENTRYPOINT_OFFSET(pFmod), rl_src1, rl_src2, local
109 rl_src2 = LoadValueWide(rl_src2, kFPReg);
110 DCHECK(rl_src2.wide)
[all...] |
| int_mips.cc | 44 RegLocation rl_src2) {
46 rl_src2 = LoadValueWide(rl_src2, kCoreReg);
50 NewLIR3(kMipsSlt, t0, rl_src1.high_reg, rl_src2.high_reg);
51 NewLIR3(kMipsSlt, t1, rl_src2.high_reg, rl_src1.high_reg);
54 NewLIR3(kMipsSltu, t0, rl_src1.low_reg, rl_src2.low_reg);
55 NewLIR3(kMipsSltu, t1, rl_src2.low_reg, rl_src1.low_reg);
329 RegLocation rl_src2) {
334 RegLocation rl_src2) {
336 rl_src2 = LoadValueWide(rl_src2, kCoreReg)
[all...] |
| codegen_mips.h | 88 RegLocation rl_src1, RegLocation rl_src2);
97 void GenMulLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
98 void GenAddLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
99 void GenAndLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
101 RegLocation rl_src1, RegLocation rl_src2);
103 RegLocation rl_src1, RegLocation rl_src2);
105 RegLocation rl_src2);
111 void GenOrLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
112 void GenSubLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
113 void GenXorLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
[all...] |
| /art/compiler/dex/quick/ |
| gen_common.cc | 86 RegLocation rl_src2, LIR* taken,
116 rl_src1 = rl_src2;
117 rl_src2 = rl_temp;
123 if (rl_src2.is_const) {
125 RegLocation rl_temp = UpdateLoc(rl_src2);
127 InexpensiveConstantInt(mir_graph_->ConstantValue(rl_src2))) {
129 OpCmpImmBranch(cond, rl_src1.low_reg, mir_graph_->ConstantValue(rl_src2), taken);
134 rl_src2 = LoadValue(rl_src2, kCoreReg);
135 OpCmpBranch(cond, rl_src1.low_reg, rl_src2.low_reg, taken)
[all...] |
| mir_to_lir.h | 393 RegLocation rl_src2, LIR* taken, LIR* fall_through);
419 RegLocation rl_src1, RegLocation rl_src2);
423 RegLocation rl_src1, RegLocation rl_src2);
427 RegLocation rl_src1, RegLocation rl_src2);
586 RegLocation rl_src1, RegLocation rl_src2) = 0;
588 RegLocation rl_src2) = 0;
590 RegLocation rl_src2) = 0;
592 RegLocation rl_src2) = 0;
595 RegLocation rl_src2) = 0;
597 RegLocation rl_src1, RegLocation rl_src2) = 0
[all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.h | 111 RegLocation rl_src1, RegLocation rl_src2);
119 RegLocation rl_src2);
121 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
125 RegLocation rl_src2);
151 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
|
| mir_to_gbc.cc | 313 ConditionCode cc, RegLocation rl_src1, RegLocation rl_src2) {
318 ::llvm::Value* src2 = GetLLVMValue(rl_src2.orig_sreg);
392 RegLocation rl_src1, RegLocation rl_src2) {
394 ::llvm::Value* src2 = GetLLVMValue(rl_src2.orig_sreg);
409 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) {
413 args.push_back(GetLLVMValue(rl_src2.orig_sreg));
429 RegLocation rl_src1, RegLocation rl_src2) {
431 ::llvm::Value* src2 = GetLLVMValue(rl_src2.orig_sreg);
623 RegLocation rl_src2) {
624 DCHECK_EQ(rl_src1.fp, rl_src2.fp)
[all...] |
