| /ndk/tests/device/test-stlport_shared-exception/jni/ |
| vtable2.cpp | 154 ptrdiff_t *vtbl; local
156 // Set vtbl to point at the beginning of S4's primary vtable.
158 vtbl = *vptr;
159 INC_VDATA (vtbl, -5);
161 if (*vtbl != ((char*) (S0*) &s4) - (char*) &s4)
163 INC_VDATA (vtbl, 1);
164 if (*vtbl != ((char*) (S1*) &s4) - (char*) &s4)
166 INC_VDATA (vtbl, 1);
167 if (*vtbl != ((char*) (S2*) &s4) - (char*) &s4)
169 INC_VDATA (vtbl, 1)
[all...] |
| /ndk/tests/device/test-stlport_static-exception/jni/ |
| vtable2.cpp | 154 ptrdiff_t *vtbl; local
156 // Set vtbl to point at the beginning of S4's primary vtable.
158 vtbl = *vptr;
159 INC_VDATA (vtbl, -5);
161 if (*vtbl != ((char*) (S0*) &s4) - (char*) &s4)
163 INC_VDATA (vtbl, 1);
164 if (*vtbl != ((char*) (S1*) &s4) - (char*) &s4)
166 INC_VDATA (vtbl, 1);
167 if (*vtbl != ((char*) (S2*) &s4) - (char*) &s4)
169 INC_VDATA (vtbl, 1)
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-table-encoding.s | 3 vtbl.8 d16, {d17}, d16
4 vtbl.8 d16, {d16, d17}, d18
5 vtbl.8 d16, {d16, d17, d18}, d20
6 vtbl.8 d16, {d16, d17, d18, d19}, d20
8 @ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xa0,0x08,0xf1,0xf3]
9 @ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xa2,0x09,0xf0,0xf3]
10 @ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xa4,0x0a,0xf0,0xf3]
11 @ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xa4,0x0b,0xf0,0xf3]
|
| neont2-table-encoding.s | 5 vtbl.8 d16, {d17}, d16
6 vtbl.8 d16, {d16, d17}, d18
7 vtbl.8 d16, {d16, d17, d18}, d20
8 vtbl.8 d16, {d16, d17, d18, d19}, d20
10 @ CHECK: vtbl.8 d16, {d17}, d16 @ encoding: [0xf1,0xff,0xa0,0x08]
11 @ CHECK: vtbl.8 d16, {d16, d17}, d18 @ encoding: [0xf0,0xff,0xa2,0x09]
12 @ CHECK: vtbl.8 d16, {d16, d17, d18}, d20 @ encoding: [0xf0,0xff,0xa4,0x0a]
13 @ CHECK: vtbl.8 d16, {d16, d17, d18, d19}, d20 @ encoding: [0xf0,0xff,0xa4,0x0b]
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/ |
| u_resource.c | 17 return ur->vtbl->resource_get_handle(screen, resource, handle);
24 ur->vtbl->resource_destroy(screen, resource);
34 return ur->vtbl->get_transfer(context, resource, level, usage, box);
41 ur->vtbl->transfer_destroy(pipe, transfer);
48 return ur->vtbl->transfer_map(pipe, transfer);
56 ur->vtbl->transfer_flush_region(pipe, transfer, box);
63 ur->vtbl->transfer_unmap(pipe, transfer);
76 ur->vtbl->transfer_inline_write(pipe,
|
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_resource.c | 17 return ur->vtbl->resource_get_handle(screen, resource, handle);
24 ur->vtbl->resource_destroy(screen, resource);
34 return ur->vtbl->get_transfer(context, resource, level, usage, box);
41 ur->vtbl->transfer_destroy(pipe, transfer);
48 return ur->vtbl->transfer_map(pipe, transfer);
56 ur->vtbl->transfer_flush_region(pipe, transfer, box);
63 ur->vtbl->transfer_unmap(pipe, transfer);
76 ur->vtbl->transfer_inline_write(pipe,
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_vtbl.c | 215 * \see intel_context.vtbl.is_hiz_depth_format
236 brw->intel.vtbl.check_vertex_size = 0;
237 brw->intel.vtbl.emit_state = 0;
238 brw->intel.vtbl.reduced_primitive_state = 0;
239 brw->intel.vtbl.render_start = 0;
240 brw->intel.vtbl.update_texture_state = 0;
242 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
243 brw->intel.vtbl.new_batch = brw_new_batch;
244 brw->intel.vtbl.finish_batch = brw_finish_batch;
245 brw->intel.vtbl.destroy = brw_destroy_context
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vtbl.c | 215 * \see intel_context.vtbl.is_hiz_depth_format
236 brw->intel.vtbl.check_vertex_size = 0;
237 brw->intel.vtbl.emit_state = 0;
238 brw->intel.vtbl.reduced_primitive_state = 0;
239 brw->intel.vtbl.render_start = 0;
240 brw->intel.vtbl.update_texture_state = 0;
242 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
243 brw->intel.vtbl.new_batch = brw_new_batch;
244 brw->intel.vtbl.finish_batch = brw_finish_batch;
245 brw->intel.vtbl.destroy = brw_destroy_context
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/pipebuffer/ |
| pb_buffer.h | 111 const struct pb_vtbl *vtbl; member in struct:pb_buffer
159 /* Accessor functions for pb->vtbl:
169 return buf->vtbl->map(buf, flags, flush_ctx);
180 buf->vtbl->unmap(buf);
196 assert(buf->vtbl->get_base_buffer);
197 buf->vtbl->get_base_buffer(buf, base_buf, offset);
209 assert(buf->vtbl->validate);
210 return buf->vtbl->validate(buf, vl, flags);
220 assert(buf->vtbl->fence);
221 buf->vtbl->fence(buf, fence)
[all...] |
| pb_buffer_malloc.c | 58 assert(buf->vtbl == &malloc_buffer_vtbl);
142 buf->base.vtbl = &malloc_buffer_vtbl;
|
| /external/mesa3d/src/gallium/auxiliary/pipebuffer/ |
| pb_buffer.h | 111 const struct pb_vtbl *vtbl; member in struct:pb_buffer
159 /* Accessor functions for pb->vtbl:
169 return buf->vtbl->map(buf, flags, flush_ctx);
180 buf->vtbl->unmap(buf);
196 assert(buf->vtbl->get_base_buffer);
197 buf->vtbl->get_base_buffer(buf, base_buf, offset);
209 assert(buf->vtbl->validate);
210 return buf->vtbl->validate(buf, vl, flags);
220 assert(buf->vtbl->fence);
221 buf->vtbl->fence(buf, fence)
[all...] |
| pb_buffer_malloc.c | 58 assert(buf->vtbl == &malloc_buffer_vtbl);
142 buf->base.vtbl = &malloc_buffer_vtbl;
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
| intel_buffers.h | 50 intel->vtbl.update_draw_buffer(intel);
|
| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| intel_buffers.h | 50 intel->vtbl.update_draw_buffer(intel);
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| radeon_context.c | 148 radeon->vtbl.get_lock = r100_get_lock;
149 radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
150 radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
151 radeon->vtbl.swtcl_flush = r100_swtcl_flush;
152 radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
153 radeon->vtbl.fallback = radeonFallback;
154 radeon->vtbl.free_context = r100_vtbl_free_context;
155 radeon->vtbl.emit_query_finish = r100_emit_query_finish;
156 radeon->vtbl.check_blit = r100_check_blit;
157 radeon->vtbl.blit = r100_blit
[all...] |
| radeon_pixel_read.c | 109 !radeon->vtbl.check_blit(dst_format, rrb->pitch / rrb->cpp) || !radeon->vtbl.blit) {
158 if (radeon->vtbl.blit(ctx,
|
| radeon_tex_copy.c | 57 if (!radeon->vtbl.blit) {
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) {
128 return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp,
|
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_context.c | 148 radeon->vtbl.get_lock = r100_get_lock;
149 radeon->vtbl.update_viewport_offset = radeonUpdateViewportOffset;
150 radeon->vtbl.emit_cs_header = r100_vtbl_emit_cs_header;
151 radeon->vtbl.swtcl_flush = r100_swtcl_flush;
152 radeon->vtbl.pre_emit_state = r100_vtbl_pre_emit_state;
153 radeon->vtbl.fallback = radeonFallback;
154 radeon->vtbl.free_context = r100_vtbl_free_context;
155 radeon->vtbl.emit_query_finish = r100_emit_query_finish;
156 radeon->vtbl.check_blit = r100_check_blit;
157 radeon->vtbl.blit = r100_blit
[all...] |
| radeon_pixel_read.c | 109 !radeon->vtbl.check_blit(dst_format, rrb->pitch / rrb->cpp) || !radeon->vtbl.blit) {
158 if (radeon->vtbl.blit(ctx,
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| i915_resource.h | 100 assert(tex->b.vtbl == &i915_texture_vtbl);
107 assert(tex->b.vtbl == &i915_buffer_vtbl);
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_resource.h | 100 assert(tex->b.vtbl == &i915_texture_vtbl);
107 assert(tex->b.vtbl == &i915_buffer_vtbl);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/svga/ |
| svga_resource_texture.h | 104 assert(tex == NULL || tex->b.vtbl == &svga_texture_vtbl);
|
| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_resource_texture.h | 104 assert(tex == NULL || tex->b.vtbl == &svga_texture_vtbl);
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| r200_context.c | 183 radeon->vtbl.get_lock = r200_get_lock;
184 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
185 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
186 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
187 radeon->vtbl.fallback = r200Fallback;
188 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
189 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
190 radeon->vtbl.check_blit = r200_check_blit;
191 radeon->vtbl.blit = r200_blit;
192 radeon->vtbl.is_format_renderable = radeonIsFormatRenderable
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_context.c | 183 radeon->vtbl.get_lock = r200_get_lock;
184 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
185 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
186 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
187 radeon->vtbl.fallback = r200Fallback;
188 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
189 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
190 radeon->vtbl.check_blit = r200_check_blit;
191 radeon->vtbl.blit = r200_blit;
192 radeon->vtbl.is_format_renderable = radeonIsFormatRenderable
[all...] |
