1 /* 2 * linux/include/asm-arm/ptrace.h 3 * 4 * Copyright (C) 1996-2003 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #ifndef __ASM_ARM_PTRACE_H 11 #define __ASM_ARM_PTRACE_H 12 13 14 #define PTRACE_GETREGS 12 15 #define PTRACE_SETREGS 13 16 #define PTRACE_GETFPREGS 14 17 #define PTRACE_SETFPREGS 15 18 19 #define PTRACE_GETWMMXREGS 18 20 #define PTRACE_SETWMMXREGS 19 21 22 #define PTRACE_OLDSETOPTIONS 21 23 24 #define PTRACE_GET_THREAD_AREA 22 25 26 #define PTRACE_SET_SYSCALL 23 27 28 /* PTRACE_SYSCALL is 24 */ 29 30 #define PTRACE_GETCRUNCHREGS 25 31 #define PTRACE_SETCRUNCHREGS 26 32 #define PTRACE_GETVFPREGS 27 33 #define PTRACE_SETVFPREGS 28 34 35 /* 36 * PSR bits 37 */ 38 #define USR26_MODE 0x00000000 39 #define FIQ26_MODE 0x00000001 40 #define IRQ26_MODE 0x00000002 41 #define SVC26_MODE 0x00000003 42 #define USR_MODE 0x00000010 43 #define FIQ_MODE 0x00000011 44 #define IRQ_MODE 0x00000012 45 #define SVC_MODE 0x00000013 46 #define ABT_MODE 0x00000017 47 #define UND_MODE 0x0000001b 48 #define SYSTEM_MODE 0x0000001f 49 #define MODE32_BIT 0x00000010 50 #define MODE_MASK 0x0000001f 51 #define PSR_T_BIT 0x00000020 52 #define PSR_F_BIT 0x00000040 53 #define PSR_I_BIT 0x00000080 54 #define PSR_J_BIT 0x01000000 55 #define PSR_Q_BIT 0x08000000 56 #define PSR_V_BIT 0x10000000 57 #define PSR_C_BIT 0x20000000 58 #define PSR_Z_BIT 0x40000000 59 #define PSR_N_BIT 0x80000000 60 #define PCMASK 0 61 62 /* 63 * Groups of PSR bits 64 */ 65 #define PSR_f 0xff000000 /* Flags */ 66 #define PSR_s 0x00ff0000 /* Status */ 67 #define PSR_x 0x0000ff00 /* Extension */ 68 #define PSR_c 0x000000ff /* Control */ 69 70 #ifndef __ASSEMBLY__ 71 72 /* 73 * This struct defines the way the registers are stored on the 74 * stack during a system call. Note that sizeof(struct pt_regs) 75 * has to be a multiple of 8. 76 */ 77 struct pt_regs { 78 long uregs[18]; 79 }; 80 81 #define ARM_cpsr uregs[16] 82 #define ARM_pc uregs[15] 83 #define ARM_lr uregs[14] 84 #define ARM_sp uregs[13] 85 #define ARM_ip uregs[12] 86 #define ARM_fp uregs[11] 87 #define ARM_r10 uregs[10] 88 #define ARM_r9 uregs[9] 89 #define ARM_r8 uregs[8] 90 #define ARM_r7 uregs[7] 91 #define ARM_r6 uregs[6] 92 #define ARM_r5 uregs[5] 93 #define ARM_r4 uregs[4] 94 #define ARM_r3 uregs[3] 95 #define ARM_r2 uregs[2] 96 #define ARM_r1 uregs[1] 97 #define ARM_r0 uregs[0] 98 #define ARM_ORIG_r0 uregs[17] 99 100 #ifdef __KERNEL__ 101 102 #define user_mode(regs) \ 103 (((regs)->ARM_cpsr & 0xf) == 0) 104 105 #ifdef CONFIG_ARM_THUMB 106 #define thumb_mode(regs) \ 107 (((regs)->ARM_cpsr & PSR_T_BIT)) 108 #else 109 #define thumb_mode(regs) (0) 110 #endif 111 112 #define processor_mode(regs) \ 113 ((regs)->ARM_cpsr & MODE_MASK) 114 115 #define interrupts_enabled(regs) \ 116 (!((regs)->ARM_cpsr & PSR_I_BIT)) 117 118 #define fast_interrupts_enabled(regs) \ 119 (!((regs)->ARM_cpsr & PSR_F_BIT)) 120 121 #define condition_codes(regs) \ 122 ((regs)->ARM_cpsr & (PSR_V_BIT|PSR_C_BIT|PSR_Z_BIT|PSR_N_BIT)) 123 124 /* Are the current registers suitable for user mode? 125 * (used to maintain security in signal handlers) 126 */ 127 static inline int valid_user_regs(struct pt_regs *regs) 128 { 129 if (user_mode(regs) && 130 (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0) 131 return 1; 132 133 /* 134 * Force CPSR to something logical... 135 */ 136 regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT; 137 138 return 0; 139 } 140 141 #endif /* __KERNEL__ */ 142 143 #define pc_pointer(v) \ 144 ((v) & ~PCMASK) 145 146 #define instruction_pointer(regs) \ 147 (pc_pointer((regs)->ARM_pc)) 148 149 #ifdef CONFIG_SMP 150 extern unsigned long profile_pc(struct pt_regs *regs); 151 #else 152 #define profile_pc(regs) instruction_pointer(regs) 153 #endif 154 155 #ifdef __KERNEL__ 156 #define predicate(x) ((x) & 0xf0000000) 157 #define PREDICATE_ALWAYS 0xe0000000 158 #endif 159 160 #endif /* __ASSEMBLY__ */ 161 162 #endif 163 164
