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      1 //=- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-=//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file implements the AntiDepBreaker class, which implements
     11 // anti-dependence breaking heuristics for post-register-allocation scheduling.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_CODEGEN_ANTIDEPBREAKER_H
     16 #define LLVM_CODEGEN_ANTIDEPBREAKER_H
     17 
     18 #include "llvm/CodeGen/MachineBasicBlock.h"
     19 #include "llvm/CodeGen/MachineFrameInfo.h"
     20 #include "llvm/CodeGen/MachineFunction.h"
     21 #include "llvm/CodeGen/MachineRegisterInfo.h"
     22 #include "llvm/CodeGen/ScheduleDAG.h"
     23 #include "llvm/Target/TargetRegisterInfo.h"
     24 #include <vector>
     25 
     26 namespace llvm {
     27 
     28 /// AntiDepBreaker - This class works into conjunction with the
     29 /// post-RA scheduler to rename registers to break register
     30 /// anti-dependencies.
     31 class AntiDepBreaker {
     32 public:
     33   typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
     34     DbgValueVector;
     35 
     36   virtual ~AntiDepBreaker();
     37 
     38   /// Start - Initialize anti-dep breaking for a new basic block.
     39   virtual void StartBlock(MachineBasicBlock *BB) =0;
     40 
     41   /// BreakAntiDependencies - Identifiy anti-dependencies within a
     42   /// basic-block region and break them by renaming registers. Return
     43   /// the number of anti-dependencies broken.
     44   ///
     45   virtual unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
     46                                          MachineBasicBlock::iterator Begin,
     47                                          MachineBasicBlock::iterator End,
     48                                          unsigned InsertPosIndex,
     49                                          DbgValueVector &DbgValues) = 0;
     50 
     51   /// Observe - Update liveness information to account for the current
     52   /// instruction, which will not be scheduled.
     53   ///
     54   virtual void Observe(MachineInstr *MI, unsigned Count,
     55                        unsigned InsertPosIndex) =0;
     56 
     57   /// Finish - Finish anti-dep breaking for a basic block.
     58   virtual void FinishBlock() =0;
     59 
     60   /// UpdateDbgValue - Update DBG_VALUE if dependency breaker is updating
     61   /// other machine instruction to use NewReg.
     62   void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
     63     assert (MI->isDebugValue() && "MI is not DBG_VALUE!");
     64     if (MI && MI->getOperand(0).isReg() && MI->getOperand(0).getReg() == OldReg)
     65       MI->getOperand(0).setReg(NewReg);
     66   }
     67 };
     68 
     69 }
     70 
     71 #endif
     72