1 //===-- MipsSEISelLowering.h - MipsSE DAG Lowering Interface ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Subclass of MipsTargetLowering specialized for mips32/64. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef MipsSEISELLOWERING_H 15 #define MipsSEISELLOWERING_H 16 17 #include "MipsISelLowering.h" 18 #include "MipsRegisterInfo.h" 19 20 namespace llvm { 21 class MipsSETargetLowering : public MipsTargetLowering { 22 public: 23 explicit MipsSETargetLowering(MipsTargetMachine &TM); 24 25 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const; 26 27 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 28 29 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 30 31 virtual MachineBasicBlock * 32 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; 33 34 virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, 35 EVT VT) const { 36 return false; 37 } 38 39 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { 40 if (VT == MVT::Untyped) 41 return Subtarget->hasDSP() ? &Mips::ACRegsDSPRegClass : 42 &Mips::ACRegsRegClass; 43 44 return TargetLowering::getRepRegClassFor(VT); 45 } 46 47 private: 48 virtual bool 49 isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo, 50 unsigned NextStackOffset, 51 const MipsFunctionInfo& FI) const; 52 53 virtual void 54 getOpndList(SmallVectorImpl<SDValue> &Ops, 55 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, 56 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, 57 CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const; 58 59 SDValue lowerMulDiv(SDValue Op, unsigned NewOpc, bool HasLo, bool HasHi, 60 SelectionDAG &DAG) const; 61 62 SDValue lowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const; 63 SDValue lowerINTRINSIC_W_CHAIN(SDValue Op, SelectionDAG &DAG) const; 64 65 MachineBasicBlock *emitBPOSGE32(MachineInstr *MI, 66 MachineBasicBlock *BB) const; 67 }; 68 } 69 70 #endif // MipsSEISELLOWERING_H 71
