1 //===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Interface definition for R600RegisterInfo 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef R600REGISTERINFO_H_ 15 #define R600REGISTERINFO_H_ 16 17 #include "AMDGPUTargetMachine.h" 18 #include "AMDGPURegisterInfo.h" 19 20 namespace llvm { 21 22 class R600TargetMachine; 23 class TargetInstrInfo; 24 25 struct R600RegisterInfo : public AMDGPURegisterInfo 26 { 27 AMDGPUTargetMachine &TM; 28 const TargetInstrInfo &TII; 29 30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii); 31 32 virtual BitVector getReservedRegs(const MachineFunction &MF) const; 33 34 /// getISARegClass - rc is an AMDIL reg class. This function returns the 35 /// R600 reg class that is equivalent to the given AMDIL reg class. 36 virtual const TargetRegisterClass * getISARegClass( 37 const TargetRegisterClass * rc) const; 38 39 /// getHWRegIndex - get the HW encoding for a register. 40 unsigned getHWRegIndex(unsigned reg) const; 41 42 /// getHWRegChan - get the HW encoding for a register's channel. 43 unsigned getHWRegChan(unsigned reg) const; 44 45 /// getCFGStructurizerRegClass - get the register class of the specified 46 /// type to use in the CFGStructurizer 47 virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const; 48 49 /// getSubRegFromChannel - Return the sub reg enum value for the given 50 /// Channel (e.g. getSubRegFromChannel(0) -> AMDGPU::sel_x) 51 unsigned getSubRegFromChannel(unsigned Channel) const; 52 53 private: 54 /// getHWRegIndexGen - Generated function returns a register's encoding 55 unsigned getHWRegIndexGen(unsigned reg) const; 56 /// getHWRegChanGen - Generated function returns a register's channel 57 /// encoding. 58 unsigned getHWRegChanGen(unsigned reg) const; 59 }; 60 61 } // End namespace llvm 62 63 #endif // AMDIDSAREGISTERINFO_H_ 64
