Lines Matching full:cunit
50 static int genTraceProfileEntry(CompilationUnit *cUnit)
54 newLIR1(cUnit, kArm16BitData, addr & 0xffff);
55 newLIR1(cUnit, kArm16BitData, (addr >> 16) & 0xffff);
56 cUnit->chainCellOffsetLIR =
57 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG);
58 cUnit->headerSize = 6;
62 newLIR2(cUnit, kThumbMovRR_H2L, r0, r15pc);
63 newLIR2(cUnit, kThumbSubRI8, r0, 10);
64 newLIR3(cUnit, kThumbLdrRRI5, r0, r0, 0);
65 newLIR3(cUnit, kThumbLdrRRI5, r1, r0, 0);
66 newLIR2(cUnit, kThumbAddRI8, r1, 1);
67 newLIR3(cUnit, kThumbStrRRI5, r1, r0, 0);
71 newLIR2(cUnit, kThumbBlx1,
74 newLIR2(cUnit, kThumbBlx2,
85 static void genNegFloat(CompilationUnit *cUnit, RegLocation rlDest,
89 rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
90 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kCoreReg, true);
91 opRegRegImm(cUnit, kOpAdd, rlResult.lowReg,
93 storeValue(cUnit, rlDest, rlResult);
96 static void genNegDouble(CompilationUnit *cUnit, RegLocation rlDest,
100 rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
101 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kCoreReg, true);
102 opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg,
104 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
105 storeValueWide(cUnit, rlDest, rlResult);
108 static void genMulLong(CompilationUnit *cUnit, RegLocation rlDest,
112 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
113 loadValueDirectWideFixed(cUnit, rlSrc2, r2, r3);
114 genDispatchToHandler(cUnit, TEMPLATE_MUL_LONG);
115 rlResult = dvmCompilerGetReturnWide(cUnit);
116 storeValueWide(cUnit, rlDest, rlResult);
124 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
133 genInterpSingleStep(cUnit, mir);
136 rlResult = loadValueWide(cUnit, rlDest, kCoreReg);
137 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
138 opRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc2.lowReg);
139 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc2.highReg);
140 storeValueWide(cUnit, rlDest, rlResult);
143 rlSrc1 = loadValueWide(cUnit, rlSrc1, kCoreReg);
144 rlResult = loadValueWide(cUnit, rlDest, kCoreReg);
145 opRegReg(cUnit, firstOp, rlSrc1.lowReg, rlResult.lowReg);
146 opRegReg(cUnit, secondOp, rlSrc1.highReg, rlResult.highReg);
148 dvmCompilerClobber(cUnit, rlResult.lowReg);
149 dvmCompilerClobber(cUnit, rlResult.highReg);
150 dvmCompilerClobber(cUnit, rlSrc1.lowReg);
151 dvmCompilerClobber(cUnit, rlSrc1.highReg);
155 storeValueWide(cUnit, rlDest, rlSrc1);
158 rlSrc2 = loadValueWide(cUnit, rlSrc2, kCoreReg);
159 rlResult = dvmCompilerEvalLoc(cUnit, rlDest, kCoreReg, false);
160 loadValueDirectWide(cUnit, rlSrc1, rlResult.lowReg,
163 opRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc2.lowReg);
164 opRegReg(cUnit, secondOp, rlResult.highReg, rlSrc2.highReg);
165 storeValueWide(cUnit, rlDest, rlResult);
169 void dvmCompilerInitializeRegAlloc(CompilationUnit *cUnit)
173 cUnit->regPool = pool;
182 dvmCompilerAllocBitVector(cUnit->numSSARegs, false);
186 static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir)
189 int rDPC = dvmCompilerAllocTemp(cUnit);
190 int rAddr = dvmCompilerAllocTemp(cUnit);
192 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset));
193 newLIR2(cUnit, kThumbMovRR, rAddr, r5FP);
194 newLIR2(cUnit, kThumbSubRI8, rAddr, sizeof(StackSaveArea) - offset);
195 storeWordDisp( cUnit, rAddr, 0, rDPC);
199 static void genMonitor(CompilationUnit *cUnit, MIR *mir)
201 genMonitorPortable(cUnit, mir);
204 static void genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest,
208 loadValueDirectWideFixed(cUnit, rlSrc1, r0, r1);
209 loadValueDirectWideFixed(cUnit, rlSrc2, r2, r3);
210 genDispatchToHandler(cUnit, TEMPLATE_CMP_LONG);
211 rlResult = dvmCompilerGetReturn(cUnit);
212 storeValue(cUnit, rlDest, rlResult);
215 static bool genInlinedAbsFloat(CompilationUnit *cUnit, MIR *mir)
218 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
219 int reg0 = loadValue(cUnit, rlSrc, kCoreReg).lowReg;
220 int signMask = dvmCompilerAllocTemp(cUnit);
221 loadConstant(cUnit, signMask, 0x7fffffff);
222 newLIR2(cUnit, kThumbAndRR, reg0, signMask);
223 dvmCompilerFreeTemp(cUnit, signMask);
224 storeWordDisp(cUnit, r6SELF, offset, reg0);
226 dvmCompilerClobber(cUnit, reg0);
230 static bool genInlinedAbsDouble(CompilationUnit *cUnit, MIR *mir)
233 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
234 RegLocation regSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
237 int signMask = dvmCompilerAllocTemp(cUnit);
238 loadConstant(cUnit, signMask, 0x7fffffff);
239 storeWordDisp(cUnit, r6SELF, offset, reglo);
240 newLIR2(cUnit, kThumbAndRR, reghi, signMask);
241 dvmCompilerFreeTemp(cUnit, signMask);
242 storeWordDisp(cUnit, r6SELF, offset + 4, reghi);
244 dvmCompilerClobber(cUnit, reghi);
249 static bool genInlinedMinMaxInt(CompilationUnit *cUnit, MIR *mir, bool isMin)
252 RegLocation rlSrc1 = dvmCompilerGetSrc(cUnit, mir, 0);
253 RegLocation rlSrc2 = dvmCompilerGetSrc(cUnit, mir, 1);
254 int reg0 = loadValue(cUnit, rlSrc1, kCoreReg).lowReg;
255 int reg1 = loadValue(cUnit, rlSrc2, kCoreReg).lowReg;
256 newLIR2(cUnit, kThumbCmpRR, reg0, reg1);
257 ArmLIR *branch1 = newLIR2(cUnit, kThumbBCond, 2,
259 newLIR2(cUnit, kThumbMovRR, reg0, reg1);
260 ArmLIR *target = newLIR0(cUnit, kArmPseudoTargetLabel);
262 newLIR3(cUnit, kThumbStrRRI5, reg0, r6SELF, offset >> 2);
265 dvmCompilerClobber(cUnit,reg0);
269 static void genMultiplyByTwoBitMultiplier(CompilationUnit *cUnit,
275 opRegRegImm(cUnit, kOpMul, rlResult.lowReg, rlSrc.lowReg, lit);
278 static void genMultiplyByShiftAndReverseSubtract(CompilationUnit *cUnit,
281 int tReg = dvmCompilerAllocTemp(cUnit);
282 opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, lit);
283 opRegRegReg(cUnit, kOpSub, rlResult.lowReg, tReg, rlSrc.lowReg);
