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    Searched refs:BUILD_VECTOR (Results 1 - 25 of 26) sorted by null

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  /external/llvm/include/llvm/CodeGen/
ISDOpcodes.h 234 /// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the
240 BUILD_VECTOR,
    [all...]
SelectionDAGNodes.h 66 /// BUILD_VECTOR where all of the elements are ~0 or undef.
70 /// BUILD_VECTOR where all of the elements are 0 or undef.
74 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
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  /external/llvm/lib/Target/R600/
R600ISelLowering.cpp     [all...]
AMDGPUISelDAGToDAG.cpp 258 case ISD::BUILD_VECTOR: {
268 default: llvm_unreachable("Do not know how to lower this BUILD_VECTOR");
270 // BUILD_VECTOR is usually lowered into an IMPLICIT_DEF + 4 INSERT_SUBREG
SIISelLowering.cpp 261 InVals.push_back(DAG.getNode(ISD::BUILD_VECTOR, DL, Arg.VT,
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp 51 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
158 // The BUILD_VECTOR operands may be of wider element types and
420 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
425 /// use a BUILD_VECTOR instead.
430 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0),
502 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
676 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, &LoOps[0], LoOps.size());
679 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, &HiOps[0], HiOps.size());
    [all...]
LegalizeVectorOps.cpp 22 // This does not legalize vector manipulations like ISD::BUILD_VECTOR,
512 SDValue Value = DAG.getNode(ISD::BUILD_VECTOR, dl,
592 // Also, we need to be able to construct a splat vector using BUILD_VECTOR.
596 TLI.getOperationAction(ISD::BUILD_VECTOR, VT) == TargetLowering::Expand)
614 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, &Ops[0], Ops.size());
769 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElems);
LegalizeTypesGeneric.cpp 330 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Parts, 2);
348 "BUILD_VECTOR operand type doesn't match vector element type!");
364 SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl,
426 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, &Ops[0], NumElts);
SelectionDAG.cpp 96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
183 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
189 if (N->getOpcode() != ISD::BUILD_VECTOR)
802 case ISD::BUILD_VECTOR: {
    [all...]
SelectionDAGDumper.cpp 114 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
DAGCombiner.cpp     [all...]
LegalizeIntegerTypes.cpp 86 case ISD::BUILD_VECTOR:
784 case ISD::BUILD_VECTOR: Res = PromoteIntOp_BUILD_VECTOR(N); break;
    [all...]
SelectionDAGBuilder.cpp 262 // Build a vector with BUILD_VECTOR or CONCAT_VECTORS from the
265 ISD::CONCAT_VECTORS : ISD::BUILD_VECTOR, DL,
328 return DAG.getNode(ISD::BUILD_VECTOR, DL, ValueVT, Val);
500 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, &Ops[0], Ops.size());
    [all...]
LegalizeDAG.cpp     [all...]
LegalizeFloatTypes.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 273 setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Custom);
274 setOperationAction(ISD::BUILD_VECTOR, MVT::v16i8, Custom);
275 setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Custom);
276 setOperationAction(ISD::BUILD_VECTOR, MVT::v8i16, Custom);
277 setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Custom);
278 setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Custom);
279 setOperationAction(ISD::BUILD_VECTOR, MVT::v1i64, Custom);
280 setOperationAction(ISD::BUILD_VECTOR, MVT::v2i64, Custom);
281 setOperationAction(ISD::BUILD_VECTOR, MVT::v2f32, Custom);
282 setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom)
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  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp 85 if (Vec.getOpcode() == ISD::BUILD_VECTOR)
86 return DAG.getNode(ISD::BUILD_VECTOR, dl, ResultVT,
162 /// BUILD_VECTORS returns a larger BUILD_VECTOR while we're trying to lower
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
AMDGPUISelLowering.cpp 91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
AMDILISelLowering.cpp 165 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
220 setOperationAction(ISD::BUILD_VECTOR, MVT::Other, Custom);
  /external/llvm/lib/Target/ARM/
ARMISelLowering.h 179 // Operands of the standard BUILD_VECTOR node are not legalized, which
183 // BUILD_VECTOR for this purpose.
184 BUILD_VECTOR,
ARMISelLowering.cpp 119 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
601 setTargetDAGCombine(ISD::BUILD_VECTOR);
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  /external/mesa3d/src/gallium/drivers/radeon/
AMDGPUISelLowering.cpp 91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG);
AMDILISelLowering.cpp 165 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
220 setOperationAction(ISD::BUILD_VECTOR, MVT::Other, Custom);
  /external/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 419 setOperationAction(ISD::BUILD_VECTOR, VT, Expand);
483 setOperationAction(ISD::BUILD_VECTOR, MVT::v16i8, Custom);
484 setOperationAction(ISD::BUILD_VECTOR, MVT::v8i16, Custom);
485 setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Custom);
486 setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom);
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