| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.cpp | 1 //===- NVPTXRegisterInfo.cpp - NVPTX Register Information -----------------===//
10 // This file contains the NVPTX implementation of the TargetRegisterInfo class.
14 #define DEBUG_TYPE "nvptx-reg-info"
17 #include "NVPTX.h"
30 if (RC == &NVPTX::Float32RegsRegClass) {
33 if (RC == &NVPTX::Float64RegsRegClass) {
35 } else if (RC == &NVPTX::Int64RegsRegClass) {
37 } else if (RC == &NVPTX::Int32RegsRegClass) {
39 } else if (RC == &NVPTX::Int16RegsRegClass) {
41 } else if (RC == &NVPTX::Int1RegsRegClass)
[all...] |
| NVPTXInstrInfo.cpp | 1 //===- NVPTXInstrInfo.cpp - NVPTX Instruction Information -----------------===//
10 // This file contains the NVPTX implementation of the TargetInstrInfo class.
14 #include "NVPTX.h"
42 if (DestRC == &NVPTX::Int32RegsRegClass)
43 BuildMI(MBB, I, DL, get(NVPTX::IMOV32rr), DestReg)
45 else if (DestRC == &NVPTX::Int1RegsRegClass)
46 BuildMI(MBB, I, DL, get(NVPTX::IMOV1rr), DestReg)
48 else if (DestRC == &NVPTX::Float32RegsRegClass)
49 BuildMI(MBB, I, DL, get(NVPTX::FMOV32rr), DestReg)
51 else if (DestRC == &NVPTX::Int16RegsRegClass
[all...] |
| NVPTXISelDAGToDAG.cpp | 1 //===-- NVPTXISelDAGToDAG.cpp - A dag to dag inst selector for NVPTX ------===//
10 // This file defines an instruction selector for the NVPTX target.
24 #define DEBUG_TYPE "nvptx-isel"
29 FMAContractLevel("nvptx-fma-level", cl::ZeroOrMore,
30 cl::desc("NVPTX Specific: FMA contraction (0: don't do it"
35 "nvptx-prec-divf32", cl::ZeroOrMore,
36 cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use"
41 UsePrecSqrtF32("nvptx-prec-sqrtf32",
42 cl::desc("NVPTX Specific: 0 use sqrt.approx, 1 use sqrt.rn."),
46 FtzEnabled("nvptx-f32ftz", cl::ZeroOrMore
[all...] |
| NVPTXFrameLowering.cpp | 1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
10 // This file contains the NVPTX implementation of TargetFrameLowering class.
15 #include "NVPTX.h"
45 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int64RegsRegClass);
47 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes_64),
48 NVPTX::VRFrame).addReg(LocalReg);
49 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64),
52 unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int32RegsRegClass);
54 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes),
55 NVPTX::VRFrame).addReg(LocalReg)
[all...] |
| Makefile | 1 ##===- lib/Target/NVPTX/Makefile ---------------------------*- Makefile -*-===##
12 TARGET = NVPTX
|
| NVPTXSubtarget.cpp | 1 //===- NVPTXSubtarget.cpp - NVPTX Subtarget Information -------------------===//
10 // This file implements the NVPTX specific subclass of TargetSubtarget.
31 drvInterface = NVPTX::NVCL;
33 drvInterface = NVPTX::CUDA;
|
| NVPTXutil.cpp | 15 #include "NVPTX.h"
22 if ((MI->getOpcode() != NVPTX::LD_i32_avar) &&
23 (MI->getOpcode() != NVPTX::LD_i64_avar))
27 if (MI->getOperand(2).getImm() != NVPTX::PTXLdStInstCode::PARAM)
|
| NVPTXAsmPrinter.cpp | 1 //===-- NVPTXAsmPrinter.cpp - NVPTX LLVM assembly writer ------------------===//
11 // of machine-dependent LLVM code to NVPTX assembly language.
17 #include "NVPTX.h"
55 EmitLineNumbers("nvptx-emit-line-numbers",
56 cl::desc("NVPTX Specific: Emit Line numbers even without -G"),
62 InterleaveSrc("nvptx-emit-src", cl::ZeroOrMore,
63 cl::desc("NVPTX Specific: Emit source line in ptx file"),
121 using namespace nvptx;
122 const MCExpr *nvptx::LowerConstant(const Constant *CV, AsmPrinter &AP) {
309 if (nvptxSubtarget.getDrvInterface() == NVPTX::CUDA
[all...] |
| NVPTXSubtarget.h | 1 //=====-- NVPTXSubtarget.h - Define Subtarget for the NVPTX ---*- C++ -*--====//
10 // This file declares the NVPTX specific subclass of TargetSubtarget.
17 #include "NVPTX.h"
30 NVPTX::DrvInterface drvInterface;
71 NVPTX::DrvInterface getDrvInterface() const { return drvInterface; }
|
| NVPTX.h | 1 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
11 // the LLVM NVPTX back-end.
74 namespace NVPTX {
181 // Defines symbolic names for NVPTX registers. This defines a mapping from
186 // Defines symbolic names for the NVPTX instructions.
|
| NVPTXISelLowering.cpp | 9 // This file defines the interfaces that NVPTX uses to lower LLVM code into a
15 #include "NVPTX.h"
40 #define DEBUG_TYPE "nvptx-lower"
47 "nvptx-sched4reg",
48 cl::desc("NVPTX Specific: schedule for register pressue"), cl::init(false));
125 addRegisterClass(MVT::i1, &NVPTX::Int1RegsRegClass);
126 addRegisterClass(MVT::i16, &NVPTX::Int16RegsRegClass);
127 addRegisterClass(MVT::i32, &NVPTX::Int32RegsRegClass);
128 addRegisterClass(MVT::i64, &NVPTX::Int64RegsRegClass);
129 addRegisterClass(MVT::f32, &NVPTX::Float32RegsRegClass)
[all...] |
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.cpp | 16 #include "NVPTX.h"
101 if (Imm & NVPTX::PTXCvtMode::FTZ_FLAG)
105 if (Imm & NVPTX::PTXCvtMode::SAT_FLAG)
109 switch (Imm & NVPTX::PTXCvtMode::BASE_MASK) {
112 case NVPTX::PTXCvtMode::NONE:
114 case NVPTX::PTXCvtMode::RNI:
117 case NVPTX::PTXCvtMode::RZI:
120 case NVPTX::PTXCvtMode::RMI:
123 case NVPTX::PTXCvtMode::RPI:
126 case NVPTX::PTXCvtMode::RN
[all...] |
| /external/clang/include/clang/Basic/ |
| TargetBuiltins.h | 53 /// \brief NVPTX builtins
54 namespace NVPTX {
|
| /external/clang/lib/Basic/ |
| Targets.cpp | [all...] |
| /external/llvm/ |
| configure | [all...] |
| /external/llvm/projects/sample/ |
| configure | [all...] |
