| /external/llvm/include/llvm/Target/ |
| TargetSubtargetInfo.h | 24 class SDep;
76 SDep& dep) const { }
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| /external/llvm/lib/CodeGen/ |
| ScheduleDAGInstrs.cpp | 264 SDep Dep;
266 Dep = SDep(SU, SDep::Artificial);
271 Dep = SDep(SU, SDep::Data, *Alias);
297 SDep::Kind Kind = MO.isUse() ? SDep::Anti : SDep::Output;
307 (Kind != SDep::Output || !MO.isDead() ||
309 if (Kind == SDep::Anti
[all...] |
| ScheduleDAG.cpp | 65 bool SUnit::addPred(const SDep &D, bool Required) {
67 for (SmallVectorImpl<SDep>::iterator I = Preds.begin(), E = Preds.end();
78 SDep ForwardD = *I;
80 for (SmallVectorImpl<SDep>::iterator II = PredSU->Succs.begin(),
93 SDep P = D;
97 if (D.getKind() == SDep::Data) {
133 void SUnit::removePred(const SDep &D) {
135 for (SmallVectorImpl<SDep>::iterator I = Preds.begin(), E = Preds.end();
139 SDep P = D;
142 SmallVectorImpl<SDep>::iterator Succ = std::find(N->Succs.begin()
[all...] |
| AggressiveAntiDepBreaker.cpp | 259 static void AntiDepEdges(const SUnit *SU, std::vector<const SDep*>& Edges) {
263 if ((P->getKind() == SDep::Anti) || (P->getKind() == SDep::Output)) {
276 const SDep *Next = 0;
288 (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) {
775 std::vector<const SDep *> Edges;
794 const SDep *Edge = Edges[i];
797 if ((Edge->getKind() != SDep::Anti) &&
798 (Edge->getKind() != SDep::Output)) continue;
841 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg)
[all...] |
| CriticalAntiDepBreaker.cpp | 126 static const SDep *CriticalPathStep(const SUnit *SU) {
127 const SDep *Next = 0;
138 (NextDepth == PredTotalLatency && P->getKind() == SDep::Anti)) {
517 if (const SDep *Edge = CriticalPathStep(CriticalPathSU)) {
521 if (Edge->getKind() == SDep::Anti) {
543 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) :
544 (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) {
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| MachineScheduler.cpp | 331 bool ScheduleDAGMI::addEdge(SUnit *SuccSU, const SDep &PredDep) {
348 void ScheduleDAGMI::releaseSucc(SUnit *SU, SDep *SuccEdge) {
382 void ScheduleDAGMI::releasePred(SUnit *SU, SDep *PredEdge) {
833 && DAG->addEdge(SUb, SDep(SUa, SDep::Cluster))) {
846 DAG->addEdge(SI->getSUnit(), SDep(SUb, SDep::Artificial));
[all...] |
| PostRASchedulerList.cpp | 174 void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
563 void SchedulePostRATDList::ReleaseSucc(SUnit *SU, SDep *SuccEdge) {
|
| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 43 /// SDep - Scheduling dependency. This represents one direction of an
45 class SDep {
95 /// SDep - Construct a null SDep. This is only for use by container
97 /// have null SDep edges.
98 SDep() : Dep(0, Data) {}
100 /// SDep - Construct an SDep with the specified values.
101 SDep(SUnit *S, Kind kind, unsigned Reg)
109 "SDep::Anti and SDep::Output must use a non-zero Reg!")
[all...] |
| MachineScheduler.h | 285 bool addEdge(SUnit *SuccSU, const SDep &PredDep);
377 void releaseSucc(SUnit *SU, SDep *SuccEdge);
379 void releasePred(SUnit *SU, SDep *PredEdge);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 87 void AddPred(SUnit *SU, const SDep &D) {
93 void RemovePred(SUnit *SU, const SDep &D) {
98 void ReleasePred(SUnit *SU, SDep *PredEdge);
139 void ScheduleDAGFast::ReleasePred(SUnit *SU, SDep *PredEdge) {
280 SDep ChainPred;
281 SmallVector<SDep, 4> ChainSuccs;
282 SmallVector<SDep, 4> LoadPreds;
283 SmallVector<SDep, 4> NodePreds;
284 SmallVector<SDep, 4> NodeSuccs;
309 const SDep &Pred = LoadPreds[i]
[all...] |
| ScheduleDAGVLIW.cpp | 86 void releaseSucc(SUnit *SU, const SDep &D);
115 void ScheduleDAGVLIW::releaseSucc(SUnit *SU, const SDep &D) {
|
| ScheduleDAGRRList.cpp | 198 void AddPred(SUnit *SU, const SDep &D) {
206 void RemovePred(SUnit *SU, const SDep &D) {
217 void ReleasePred(SUnit *SU, const SDep *PredEdge);
224 void CapturePred(SDep *PredEdge);
364 void ScheduleDAGRRList::ReleasePred(SUnit *SU, const SDep *PredEdge) {
790 void ScheduleDAGRRList::CapturePred(SDep *PredEdge) {
[all...] |
| ScheduleDAGSDNodes.h | 32 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output
103 unsigned OpIdx, SDep& dep) const;
|
| ScheduleDAGSDNodes.cpp | 488 SDep Dep = isChain ? SDep(OpSU, SDep::Barrier)
489 : SDep(OpSU, SDep::Data, PhysReg);
620 unsigned OpIdx, SDep& dep) const{
625 if (dep.getKind() != SDep::Data)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 144 bool IsCallDependent(MachineInstr* MI, SDep::Kind DepType, unsigned DepReg);
145 bool PromoteToDotNew(MachineInstr* MI, SDep::Kind DepType,
322 SDep::Kind DepType,
354 if (IsIndirectCall(MI) && (DepType == SDep::Data)) {
364 static bool IsRegDependence(const SDep::Kind DepType) {
365 return (DepType == SDep::Data || DepType == SDep::Anti ||
366 DepType == SDep::Output);
432 SDep::Kind DepType, MachineBasicBlock::iterator &MII,
435 assert (DepType == SDep::Data)
[all...] |
| HexagonMachineScheduler.cpp | 34 SUnits[su].addPred(SDep(LastSequentialCall, SDep::Barrier));
|
| /external/llvm/lib/Target/R600/ |
| R600Packetizer.cpp | 186 const SDep &Dep = SUJ->Succs[i];
189 if (Dep.getKind() == SDep::Anti)
191 if (Dep.getKind() == SDep::Output)
|
