| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| i915_state_static.c | 101 uint32_t draw_offset, draw_size; local
141 draw_offset = x | (y << 16);
144 if (i915->current.draw_offset != draw_offset) {
145 i915->current.draw_offset = draw_offset;
|
| i915_context.h | 173 uint32_t draw_offset; member in struct:i915_state
|
| i915_state_emit.c | 63 * - I915_PIPELINE_FLUSH which is specifically for the draw_offset flush.
523 OUT_BATCH(i915->current.draw_offset);
525 OUT_BATCH(i915->current.draw_offset);
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_state_static.c | 101 uint32_t draw_offset, draw_size; local
141 draw_offset = x | (y << 16);
144 if (i915->current.draw_offset != draw_offset) {
145 i915->current.draw_offset = draw_offset;
|
| i915_context.h | 173 uint32_t draw_offset; member in struct:i915_state
|
| i915_state_emit.c | 63 * - I915_PIPELINE_FLUSH which is specifically for the draw_offset flush.
523 OUT_BATCH(i915->current.draw_offset);
525 OUT_BATCH(i915->current.draw_offset);
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| radeon_pixel_read.c | 160 rrb->draw_offset,
|
| radeon_tex_copy.c | 84 intptr_t src_offset = rrb->draw_offset;
|
| radeon_common_context.h | 96 uint32_t draw_offset; /* FBO */ member in struct:radeon_renderbuffer
115 uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ member in struct:radeon_colorbuffer_state
|
| radeon_fbo.c | 281 ok = rmesa->vtbl.blit(ctx, rrb->bo, rrb->draw_offset,
337 map += rrb->draw_offset;
446 rrb->bo, rrb->draw_offset,
890 rrb->draw_offset = imageOffset;
|
| radeon_common.c | 256 offset = rrb->draw_offset;
320 radeon->state.color.draw_offset = offset;
|
| radeon_state_init.c | 391 OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_pixel_read.c | 160 rrb->draw_offset,
|
| radeon_tex_copy.c | 84 intptr_t src_offset = rrb->draw_offset;
|
| radeon_common_context.h | 96 uint32_t draw_offset; /* FBO */ member in struct:radeon_renderbuffer
115 uint32_t draw_offset; /* offset into color renderbuffer - FBOs */ member in struct:radeon_colorbuffer_state
|
| radeon_fbo.c | 281 ok = rmesa->vtbl.blit(ctx, rrb->bo, rrb->draw_offset,
337 map += rrb->draw_offset;
446 rrb->bo, rrb->draw_offset,
890 rrb->draw_offset = imageOffset;
|
| radeon_common.c | 256 offset = rrb->draw_offset;
320 radeon->state.color.draw_offset = offset;
|
| radeon_state_init.c | 391 OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
| i915_vtbl.c | 588 uint32_t draw_x, draw_y, draw_offset; local
666 draw_offset = (draw_y << 16) | draw_x;
672 if (draw_offset != i915->last_draw_offset) {
674 i915->last_draw_offset = draw_offset;
680 state->Buffer[I915_DESTREG_DRAWRECT3] = draw_offset;
684 state->Buffer[I915_DESTREG_DRAWRECT5] = draw_offset;
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| i915_vtbl.c | 588 uint32_t draw_x, draw_y, draw_offset; local
666 draw_offset = (draw_y << 16) | draw_x;
672 if (draw_offset != i915->last_draw_offset) {
674 i915->last_draw_offset = draw_offset;
680 state->Buffer[I915_DESTREG_DRAWRECT3] = draw_offset;
684 state->Buffer[I915_DESTREG_DRAWRECT5] = draw_offset;
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| r200_state_init.c | 510 OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_state_init.c | 510 OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
[all...] |
