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    Searched refs:getRegMask (Results 1 - 15 of 15) sorted by null

  /external/llvm/lib/CodeGen/
DeadMachineInstructionElim.cpp 166 LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
RegisterScavenging.cpp 129 (isPred ? DefRegs : KillRegs).setBitsNotInMask(MO.getRegMask());
310 Candidates.clearBitsNotInMask(MO.getRegMask());
VirtRegMap.cpp 282 MRI->addPhysRegsUsedFromRegMask(MO.getRegMask());
MachineInstr.cpp 203 return getRegMask() == Other.getRegMask();
244 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getRegMask());
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PostRASchedulerList.cpp 491 LiveRegs.clearBitsNotInMask(MO.getRegMask());
RegAllocFast.cpp     [all...]
LiveIntervalAnalysis.cpp 214 RegMaskBits.push_back(MO->getRegMask());
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MachineLICM.cpp 427 PhysRegClobbers.setBitsNotInMask(MO.getRegMask());
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MachineVerifier.cpp     [all...]
  /external/llvm/include/llvm/CodeGen/
MachineOperand.h 469 return clobbersPhysReg(getRegMask(), PhysReg);
472 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
474 const uint32_t *getRegMask() const {
SelectionDAGNodes.h     [all...]
  /dalvik/vm/compiler/codegen/x86/libenc/
enc_defs.h 705 inline unsigned getRegMask(RegName reg)
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 377 MIB.addRegMask(RM->getRegMask());
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ScheduleDAGRRList.cpp     [all...]
SelectionDAG.cpp 398 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
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