| /external/llvm/test/Transforms/InstCombine/ |
| 2012-04-23-Neon-Intrinsics.ll | 6 define <4 x i32> @mulByZero(<4 x i16> %x) nounwind readnone ssp {
8 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> zeroinitializer) nounwind
14 define <4 x i32> @mulByOne(<4 x i16> %x) nounwind readnone ssp {
16 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> %x, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
23 define <4 x i32> @constantMul() nounwind readnone ssp {
25 %a = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 3, i16 3, i16 3, i16 3>, <4 x i16> <i16 2, i16 2, i16 2, i16 2>) nounwind
31 define <4 x i32> @constantMulS() nounwind readnone ssp {
33 %b = tail call <4 x i32> @llvm.arm.neon.vmulls.v4i32(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
39 define <4 x i32> @constantMulU() nounwind readnone ssp {
41 %b = tail call <4 x i32> @llvm.arm.neon.vmullu.v4i32(<4 x i16> <i16 -1, i16 -1, i16 -1, i16 -1>, <4 x i16> <i16 1, i16 1, i16 1, i16 1>) nounwind
[all...] |
| /external/llvm/test/Transforms/SimplifyCFG/ |
| switch-on-const-select.ll | 4 define i32 @foo(i64 %x, i64 %y) nounwind {
19 tail call void @bees.a() nounwind
25 tail call void @bees.b() nounwind
29 tail call void @llvm.trap() nounwind
34 define i32 @bar(i64 %x, i64 %y) nounwind {
49 tail call void @bees.a() nounwind
52 tail call void @bees.b() nounwind
55 tail call void @llvm.trap() nounwind
60 define void @bazz(i64 %x, i64 %y) nounwind {
74 tail call void @bees.a() nounwind
[all...] |
| /external/llvm/test/Assembler/ |
| unnamed-addr.ll | 8 define i32 @main() unnamed_addr nounwind ssp {
10 %call2 = tail call i32 @zed(%struct.foobar* @foo.d, %struct.foobar* @bar.d) nounwind
20 ; CHECK: attributes #0 = { nounwind ssp }
|
| /external/llvm/test/CodeGen/ARM/ |
| 2009-09-27-CoalescerBug.ll | 8 define arm_aapcs_vfpcc i64 @__fixsfdi(float %a) nounwind {
15 %2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
20 %4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
|
| 2009-11-01-NeonMoves.ll | 8 define arm_aapcs_vfpcc void @bar(%foo* noalias sret %agg.result, <4 x float> %quat.0) nounwind {
13 %1 = call arm_aapcs_vfpcc <4 x float> @quux(%foo* %quat_addr) nounwind ; <<4 x float>> [#uses=3]
19 %5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x float>> [#uses=2]
20 %6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x float>> [#uses=2]
23 %8 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %7) nounwind ; <<4 x float>> [#uses=3]
25 %10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4 x float>> [#uses=1]
28 %13 = call arm_aapcs_vfpcc %foo* @baz(%foo* %agg.result, <4 x float> %12) nounwind ; <%foo*> [#uses=0]
32 declare arm_aapcs_vfpcc %foo* @baz(%foo*, <4 x float>) nounwind
34 declare arm_aapcs_vfpcc <4 x float> @quux(%foo* nocapture) nounwind readonly
36 declare <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float>, <2 x float>) nounwind readnon
[all...] |
| 2010-06-29-SubregImpDefs.ll | 6 define i32 @main(i32 %argc, i8** %argv) nounwind {
11 call void @PrintShortX(i8* getelementptr inbounds ([21 x i8]* @.str271, i32 0, i32 0), <8 x i16> %val4723, i32 0) nounwind
15 declare void @PrintShortX(i8*, <8 x i16>, i32) nounwind
|
| vhadd.ll | 3 define <8 x i8> @vhadds8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
12 define <4 x i16> @vhadds16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
21 define <2 x i32> @vhadds32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
30 define <8 x i8> @vhaddu8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
39 define <4 x i16> @vhaddu16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
48 define <2 x i32> @vhaddu32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
57 define <16 x i8> @vhaddQs8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
66 define <8 x i16> @vhaddQs16(<8 x i16>* %A, <8 x i16>* %B) nounwind {
75 define <4 x i32> @vhaddQs32(<4 x i32>* %A, <4 x i32>* %B) nounwind {
84 define <16 x i8> @vhaddQu8(<16 x i8>* %A, <16 x i8>* %B) nounwind {
[all...] |
| vshrn.ll | 3 define <8 x i8> @vshrns8(<8 x i16>* %A) nounwind {
11 define <4 x i16> @vshrns16(<4 x i32>* %A) nounwind {
19 define <2 x i32> @vshrns32(<2 x i64>* %A) nounwind {
27 declare <8 x i8> @llvm.arm.neon.vshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnone
28 declare <4 x i16> @llvm.arm.neon.vshiftn.v4i16(<4 x i32>, <4 x i32>) nounwind readnone
29 declare <2 x i32> @llvm.arm.neon.vshiftn.v2i32(<2 x i64>, <2 x i64>) nounwind readnone
31 define <8 x i8> @vrshrns8(<8 x i16>* %A) nounwind {
39 define <4 x i16> @vrshrns16(<4 x i32>* %A) nounwind {
47 define <2 x i32> @vrshrns32(<2 x i64>* %A) nounwind {
55 declare <8 x i8> @llvm.arm.neon.vrshiftn.v8i8(<8 x i16>, <8 x i16>) nounwind readnon
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| donothing.ll | 8 define void @f1() nounwind uwtable ssp {
21 tail call void @__cxa_call_unexpected(i8* %1) noreturn nounwind
26 define void @f2() nounwind {
|
| /external/llvm/test/CodeGen/MSP430/ |
| 2009-11-05-8BitLibcalls.ll | 8 define signext i8 @foo(i8 signext %_si1, i8 signext %_si2) nounwind readnone {
16 define void @uint81(i16* nocapture %p_32) nounwind {
18 %call = tail call i16 @bar(i8* bitcast (i8 (i8, i8)* @foo to i8*)) nounwind ; <i16> [#uses=0]
|
| /external/llvm/test/CodeGen/Mips/ |
| gpreg-lazy-binding.ll | 11 define void @f0() nounwind {
13 tail call void @externalFunc() nounwind
20 define internal fastcc void @internalFunc() nounwind noinline {
|
| mips64ext.ll | 3 define i64 @zext64_32(i32 %a) nounwind readnone {
13 define i64 @sext64_32(i32 %a) nounwind readnone {
20 define i64 @i64_float(float %f) nounwind readnone {
|
| shift-parts.ll | 3 define i64 @shl0(i64 %a, i32 %b) nounwind readnone {
12 define i64 @shr1(i64 %a, i32 %b) nounwind readnone {
21 define i64 @sra2(i64 %a, i32 %b) nounwind readnone {
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2008-07-24-PPC64-CCBug.ll | 5 define void @llvm_static_func(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15) nounwind {
7 tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @"\01LC", i32 0, i64 0), i32 %a8 ) nounwind ; <i32>:0 [#uses=0]
11 declare i32 @printf(i8*, ...) nounwind
|
| atomic-1.ll | 3 define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind {
11 define i32 @exchange_and_cmp(i32* %mem) nounwind {
20 define i32 @exchange(i32* %mem, i32 %val) nounwind {
|
| ppc64-abi-extend.ll | 16 define void @pass_arg_si() nounwind {
19 tail call void @arg_si(i32 signext %0) nounwind
26 define void @pass_arg_ui() nounwind {
29 tail call void @arg_ui(i32 zeroext %0) nounwind
36 define i64 @use_arg_si(i32 signext %x) nounwind readnone {
45 define i64 @use_arg_ui(i32 zeroext %x) nounwind readnone {
54 define signext i32 @pass_ret_si() nounwind readonly {
63 define zeroext i32 @pass_ret_ui() nounwind readonly {
72 define i64 @use_ret_si() nounwind {
74 %call = tail call signext i32 @ret_si() nounwind
[all...] |
| remat-imm.ll | 8 define i32 @main() nounwind {
12 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), i32 128, i32 128) nounwind
16 declare i32 @printf(i8* nocapture, ...) nounwind
|
| unwind-dw2.ll | 5 ; Function Attrs: nounwind
12 ; Function Attrs: nounwind
15 attributes #0 = { nounwind }
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2010-11-22-EpilogueBug.ll | 6 declare void @bar() nounwind optsize
8 define void @foo() nounwind optsize {
21 call void @bar() nounwind optsize
|
| /external/llvm/test/CodeGen/X86/ |
| 2008-03-10-RegAllocInfLoop.ll | 4 declare fastcc i8* @w_addchar(i8*, i32*, i32*, i8 signext ) nounwind
6 define x86_stdcallcc i32 @parse_backslash(i8** inreg %word, i32* inreg %word_length, i32* inreg %max_length) nounwind {
11 %tmp26 = call fastcc i8* @w_addchar( i8* null, i32* %word_length, i32* %max_length, i8 signext %tmp6 ) nounwind ; <i8*> [#uses=1]
|
| 2009-08-23-SubRegReuseUndo.ll | 8 declare signext i8 @foo(i32, i8 signext) nounwind readnone
10 declare signext i8 @bar(i32, i8 signext) nounwind readnone
12 define i32 @uint80(i8 signext %p_52) nounwind {
15 %1 = tail call i32 @func_24(i16 zeroext %0, i8 signext ptrtoint (i8 (i32, i8)* @foo to i8)) nounwind; <i32> [#uses=1]
18 %4 = tail call i32 @safe(i32 1) nounwind ; <i32> [#uses=0]
19 %5 = tail call i32 @func_24(i16 zeroext 0, i8 signext undef) nounwind; <i32> [#uses=1]
25 %11 = tail call i32 @func_24(i16 zeroext ptrtoint (i8 (i32, i8)* @bar to i16), i8 signext %10) nounwind; <i32> [#uses=1]
26 %12 = tail call i32 @func_24(i16 zeroext 0, i8 signext 1) nounwind; <i32> [#uses=0]
38 %14 = tail call i32 @safe(i32 -2) nounwind ; <i32> [#uses=0]
40 %16 = tail call signext i8 @func_53(i8 signext undef, i8 signext 1, i8 signext %15, i8 signext %8) nounwind; <i8> [#uses=0
[all...] |
| 2009-10-14-LiveVariablesBug.ll | 7 define void @foo(i16 signext %source) nounwind ssp {
12 call void asm sideeffect "# top of block", "~{dirflag},~{fpsr},~{flags},~{edi},~{esi},~{edx},~{ecx},~{eax}"() nounwind
13 %asmtmp = call i16 asm sideeffect "movw $1, $0", "=={ax},*m,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %source_addr) nounwind ; <i16> [#uses=0]
|
| 2010-07-06-asm-RIP.ll | 6 define void @f(i32*) nounwind ssp {
10 define void @g() nounwind ssp {
15 call void asm sideeffect "push\09$1$1\0A\09call\09${1:a}\0A\09pop\09%edx", "imr,i,~{dirflag},~{fpsr},~{flags},~{memory},~{cc},~{edi},~{esi},~{edx},~{ecx},~{ebx},~{eax}"(i32* @n, void (i32*)* @f) nounwind
|
| 2011-08-23-Trampoline.ll | 13 declare void @gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets__move.5177(%struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets* nest , i32, i32) nounwind
15 declare void @llvm.init.trampoline(i8*, i8*, i8*) nounwind
16 declare i8* @llvm.adjust.trampoline(i8*) nounwind
|
| bc-extract.ll | 4 define float @extractFloat1() nounwind {
12 define float @extractFloat2() nounwind {
20 define i32 @extractInt2() nounwind {
|
