| /external/llvm/test/CodeGen/Mips/ |
| fpbr.ll | 3 define void @func0(float %f2, float %f3) nounwind {
11 tail call void (...)* @g0() nounwind
15 tail call void (...)* @g1() nounwind
26 define void @func1(float %f2, float %f3) nounwind {
34 tail call void (...)* @g0() nounwind
38 tail call void (...)* @g1() nounwind
45 define void @func2(float %f2, float %f3) nounwind {
53 tail call void (...)* @g0() nounwind
57 tail call void (...)* @g1() nounwind
64 define void @func3(double %f2, double %f3) nounwind {
[all...] |
| dsp-r2.ll | 3 define i64 @test__builtin_mips_dpa_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nounwind readnone {
13 declare i64 @llvm.mips.dpa.w.ph(i64, <2 x i16>, <2 x i16>) nounwind readnone
15 define i64 @test__builtin_mips_dps_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nounwind readnone {
25 declare i64 @llvm.mips.dps.w.ph(i64, <2 x i16>, <2 x i16>) nounwind readnone
27 define i64 @test__builtin_mips_mulsa_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nounwind readnone {
37 declare i64 @llvm.mips.mulsa.w.ph(i64, <2 x i16>, <2 x i16>) nounwind readnone
39 define i64 @test__builtin_mips_dpax_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nounwind readnone {
49 declare i64 @llvm.mips.dpax.w.ph(i64, <2 x i16>, <2 x i16>) nounwind readnone
51 define i64 @test__builtin_mips_dpsx_w_ph1(i32 %i0, i32, i64 %a0, i32 %a1.coerce, i32 %a2.coerce) nounwind readnone {
61 declare i64 @llvm.mips.dpsx.w.ph(i64, <2 x i16>, <2 x i16>) nounwind readnon
[all...] |
| select.ll | 6 define i32 @sel1(i32 %s, i32 %f0, i32 %f1) nounwind readnone {
14 define float @sel2(i32 %s, float %f0, float %f1) nounwind readnone {
22 define double @sel2_1(i32 %s, double %f0, double %f1) nounwind readnone {
30 define float @sel3(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
39 define float @sel4(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
48 define float @sel5(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
57 define double @sel5_1(double %f0, double %f1, float %f2, float %f3) nounwind readnone {
66 define double @sel6(double %f0, double %f1, double %f2, double %f3) nounwind readnone {
75 define double @sel7(double %f0, double %f1, double %f2, double %f3) nounwind readnone {
84 define double @sel8(double %f0, double %f1, double %f2, double %f3) nounwind readnone
[all...] |
| stchar.ll | 8 define void @p1(i16 signext %s, i8 signext %c) nounwind {
12 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv, i32 %conv1) nounwind
16 declare i32 @printf(i8* nocapture, ...) nounwind
18 define void @p2() nounwind {
26 %call.i = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv.i, i32 %conv1.i) nounwind
34 define void @test() nounwind {
42 %call.i.i = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 16, i32 99) nounwind
51 %call.i = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %conv.i, i32 %conv1.i) nounwind
61 define i32 @main() nounwind {
66 call void @llvm.lifetime.start(i64 -1, i8* %0) nounwind
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vst2.ll | 3 define void @vst2i8(i8* %A, <8 x i8>* %B) nounwind {
13 define void @vst2i8_update(i8** %ptr, <8 x i8>* %B, i32 %inc) nounwind {
24 define void @vst2i16(i16* %A, <4 x i16>* %B) nounwind {
34 define void @vst2i32(i32* %A, <2 x i32>* %B) nounwind {
43 define void @vst2f(float* %A, <2 x float>* %B) nounwind {
52 define void @vst2i64(i64* %A, <1 x i64>* %B) nounwind {
63 define void @vst2i64_update(i64** %ptr, <1 x i64>* %B) nounwind {
75 define void @vst2Qi8(i8* %A, <16 x i8>* %B) nounwind {
84 define void @vst2Qi16(i16* %A, <8 x i16>* %B) nounwind {
94 define void @vst2Qi32(i32* %A, <4 x i32>* %B) nounwind {
[all...] |
| neon_spill.ll | 16 declare arm_aapcs_vfpcc void @func1(%0*, float* nocapture, float* nocapture, %2*) nounwind
24 define arm_aapcs_vfpcc void @foo(%3* nocapture) nounwind align 2 {
25 call void @llvm.arm.neon.vst4.v4i32(i8* undef, <4 x i32> <i32 0, i32 1065353216, i32 1073741824, i32 1077936128>, <4 x i32> <i32 1082130432, i32 1084227584, i32 1086324736, i32 1088421888>, <4 x i32> <i32 1090519040, i32 1091567616, i32 1092616192, i32 1093664768>, <4 x i32> <i32 1094713344, i32 1095761920, i32 1096810496, i32 1097859072>, i32 16) nounwind
26 %2 = call arm_aapcs_vfpcc %0** @func2() nounwind
29 %4 = call arm_aapcs_vfpcc %2* @func3(%2* undef, %2* undef, i32 2956) nounwind
31 %5 = call arm_aapcs_vfpcc %0** @func2() nounwind
35 %6 = call arm_aapcs_vfpcc %2** @func4() nounwind
36 %7 = call arm_aapcs_vfpcc %2* @func3(%2* undef, %2* undef, i32 2971) nounwind
39 %9 = call arm_aapcs_vfpcc i32 @rand() nounwind
43 call void @llvm.arm.neon.vst4.v4i32(i8* undef, <4 x i32> <i32 0, i32 1065353216, i32 1073741824, i32 1077936128>, <4 x i32> <i32 1082130432, i32 1084227584, i32 1086324736, i32 1088421888>, <4 x i32> <i32 1090519040, i32 1091567616, i32 1092616192, i32 1093664768>, <4 x i32> <i32 1094713344, i32 1095761920, i32 1096810496, i32 1097859072>, i32 16) nounwind
[all...] |
| struct_byval.ll | 7 define i32 @f() nounwind ssp {
19 define i32 @g() nounwind ssp {
32 define i32 @h() nounwind ssp {
44 declare i32 @e1(%struct.SmallStruct* nocapture byval %in) nounwind
45 declare i32 @e2(%struct.LargeStruct* nocapture byval %in) nounwind
46 declare i32 @e3(%struct.LargeStruct* nocapture byval align 16 %in) nounwind
51 define void @f3(%struct.SmallStruct* nocapture byval %s) nounwind optsize {
60 define void @f4(%struct.SmallStruct* nocapture byval %s) nounwind optsize {
71 define void @f5(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval %s) nounwind optsize {
80 define void @f6(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval %s) nounwind optsize
[all...] |
| vst1.ll | 3 define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind {
12 define void @vst1i16(i16* %A, <4 x i16>* %B) nounwind {
21 define void @vst1i32(i32* %A, <2 x i32>* %B) nounwind {
30 define void @vst1f(float* %A, <2 x float>* %B) nounwind {
40 define void @vst1f_update(float** %ptr, <2 x float>* %B) nounwind {
52 define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind {
61 define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind {
70 define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind {
81 define void @vst1Qi16_update(i16** %ptr, <8 x i16>* %B, i32 %inc) nounwind {
93 define void @vst1Qi32(i32* %A, <4 x i32>* %B) nounwind {
[all...] |
| vbsl.ll | 5 define <8 x i8> @v_bsli8(<8 x i8>* %A, <8 x i8>* %B, <8 x i8>* %C) nounwind {
18 define <4 x i16> @v_bsli16(<4 x i16>* %A, <4 x i16>* %B, <4 x i16>* %C) nounwind {
31 define <2 x i32> @v_bsli32(<2 x i32>* %A, <2 x i32>* %B, <2 x i32>* %C) nounwind {
44 define <1 x i64> @v_bsli64(<1 x i64>* %A, <1 x i64>* %B, <1 x i64>* %C) nounwind {
57 define <16 x i8> @v_bslQi8(<16 x i8>* %A, <16 x i8>* %B, <16 x i8>* %C) nounwind {
70 define <8 x i16> @v_bslQi16(<8 x i16>* %A, <8 x i16>* %B, <8 x i16>* %C) nounwind {
83 define <4 x i32> @v_bslQi32(<4 x i32>* %A, <4 x i32>* %B, <4 x i32>* %C) nounwind {
96 define <2 x i64> @v_bslQi64(<2 x i64>* %A, <2 x i64>* %B, <2 x i64>* %C) nounwind {
109 define <8 x i8> @f1(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) nounwind readnone optsize ssp {
112 %vbsl.i = tail call <8 x i8> @llvm.arm.neon.vbsl.v8i8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c) nounwind
[all...] |
| 2010-04-13-v2f64SplitArg.ll | 4 define void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
|
| 2010-11-29-PrologueBug.ll | 5 define i32* @t(i32* %x) nounwind {
22 %0 = tail call i32* @foo(i32* %x) nounwind
23 %1 = tail call i32* @foo(i32* %0) nounwind
24 %2 = tail call i32* @foo(i32* %1) nounwind
|
| /external/llvm/test/CodeGen/X86/ |
| sse41.ll | 6 define <4 x i32> @pinsrd_1(i32 %s, <4 x i32> %tmp) nounwind {
16 define <16 x i8> @pinsrb_1(i8 %s, <16 x i8> %tmp) nounwind {
27 define <2 x i64> @pmovsxbd_1(i32* %p) nounwind {
35 %6 = tail call <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8> %5) nounwind readnone
47 define <2 x i64> @pmovsxwd_1(i64* %p) nounwind readonly {
52 %2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind readnone ; <<4 x i32>> [#uses=1]
67 define <2 x i64> @pmovzxbq_1() nounwind {
72 %3 = tail call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %2) nounwind readnone ; <<2 x i64>> [#uses=1]
84 declare <4 x i32> @llvm.x86.sse41.pmovsxbd(<16 x i8>) nounwind readnone
85 declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnon
[all...] |
| fma.ll | 12 define float @test_f32(float %a, float %b, float %c) nounwind readnone ssp {
14 %call = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone
22 define double @test_f64(double %a, double %b, double %c) nounwind readnone ssp {
24 %call = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone
31 define x86_fp80 @test_f80(x86_fp80 %a, x86_fp80 %b, x86_fp80 %c) nounwind readnone ssp {
33 %call = tail call x86_fp80 @llvm.fma.f80(x86_fp80 %a, x86_fp80 %b, x86_fp80 %c) nounwind readnone
39 define float @test_f32_cst() nounwind readnone ssp {
41 %call = tail call float @llvm.fma.f32(float 3.0, float 3.0, float 3.0) nounwind readnone
45 declare float @llvm.fma.f32(float, float, float) nounwind readnone
46 declare double @llvm.fma.f64(double, double, double) nounwind readnon
[all...] |
| narrow-shl-cst.ll | 4 define i32 @test1(i32 %x) nounwind {
13 define i32 @test2(i32 %x) nounwind {
22 define i32 @test3(i32 %x) nounwind {
31 define i64 @test4(i64 %x) nounwind {
40 define i64 @test5(i64 %x) nounwind {
49 define i64 @test6(i64 %x) nounwind {
58 define i64 @test7(i64 %x) nounwind {
67 define i64 @test8(i64 %x) nounwind {
76 define i64 @test9(i64 %x) nounwind {
85 define i64 @test10(i64 %x) nounwind {
[all...] |
| smul-with-overflow.ll | 6 define i1 @test1(i32 %v1, i32 %v2) nounwind {
14 %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
18 %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
25 define i1 @test2(i32 %v1, i32 %v2) nounwind {
33 %t2 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @no, i32 0, i32 0) ) nounwind
37 %t1 = tail call i32 (i8*, ...)* @printf( i8* getelementptr ([4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
44 declare i32 @printf(i8*, ...) nounwind
47 define i32 @test3(i32 %a, i32 %b) nounwind readnone {
59 define i32 @test4(i32 %a, i32 %b) nounwind readnone {
71 declare { i63, i1 } @llvm.smul.with.overflow.i63(i63, i63) nounwind readnon
[all...] |
| fast-isel.ll | 6 define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind {
30 define void @bar(double* %p, double* %q) nounwind {
48 define i32 @cast() nounwind {
54 define void @ptrtoint_i1(i8* %p, i1* %q) nounwind {
59 define i8* @inttoptr_i1(i1 %p) nounwind {
63 define i32 @ptrtoint_i32(i8* %p) nounwind {
67 define i8* @inttoptr_i32(i32 %p) nounwind {
72 define void @trunc_i32_i8(i32 %x, i8* %p) nounwind {
78 define void @trunc_i16_i8(i16 signext %x, i8* %p) nounwind {
84 define void @shl_i8(i8 %a, i8 %c, i8* %p) nounwind {
[all...] |
| mmx-builtins.ll | 4 declare x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx, x86_mmx) nounwind readnone
6 define i64 @test1(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp {
13 %4 = tail call x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx %2, x86_mmx %3) nounwind readnone
20 declare x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx, x86_mmx) nounwind readnone
22 define i64 @test88(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp {
29 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
36 declare x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx, x86_mmx) nounwind readnone
38 define i64 @test87(<1 x i64> %a, <1 x i64> %b) nounwind readnone optsize ssp {
45 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind
52 declare x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx, x86_mmx) nounwind readnon
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| bitcast-alias-function.ll | 52 define internal <2 x i32> @func_v2i32(<2 x i32> %v) noinline nounwind {
57 define internal <2 x float> @func_v2f32(<2 x float> %v) noinline nounwind {
62 define internal <4 x float> @func_v4f32(<4 x float> %v) noinline nounwind {
67 define internal i32 @func_i32(i32 %v) noinline nounwind {
72 define internal i64 @func_i64(i64 %v) noinline nounwind {
77 define internal <2 x i64> @func_v2i64(<2 x i64> %v) noinline nounwind {
82 define internal <2 x i32*> @func_v2i32p(<2 x i32*> %v) noinline nounwind {
90 define void @bitcast_alias_scalar(float* noalias %source, float* noalias %dest) nounwind {
98 %call = call float @alias_i32_to_f32(float %tmp) nounwind
104 define void @bitcast_alias_vector(<2 x float>* noalias %source, <2 x float>* noalias %dest) nounwind {
[all...] |
| /external/clang/test/CodeGenCXX/ |
| cxx11-noreturn.cpp | 10 // CHECK: attributes [[NR]] = { noreturn nounwind{{.*}} }
|
| /external/clang/test/Frontend/ |
| ir-support-codegen.ll | 7 define i32 @f0() nounwind ssp {
|
| ir-support-errors.ll | 5 define i32 @f0() nounwind ssp {
|
| /external/llvm/test/Analysis/CallGraph/ |
| do-nothing-intrinsic.ll | 13 declare void @llvm.donothing() nounwind readnone
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| trip-count3.ll | 18 declare void @sha_init(%struct.SHA_INFO* nocapture) nounwind
20 declare fastcc void @sha_transform(%struct.SHA_INFO* nocapture) nounwind
22 declare void @sha_print(%struct.SHA_INFO* nocapture) nounwind
24 declare i32 @printf(i8* nocapture, ...) nounwind
26 declare void @sha_final(%struct.SHA_INFO* nocapture) nounwind
28 declare void @sha_update(%struct.SHA_INFO* nocapture, i8* nocapture, i32) nounwind
30 declare i64 @fread(i8* noalias nocapture, i64, i64, %struct.FILE* noalias nocapture) nounwind
32 declare i32 @main(i32, i8** nocapture) nounwind
34 declare noalias %struct.FILE* @fopen(i8* noalias nocapture, i8* noalias nocapture) nounwind
36 declare i32 @fclose(%struct.FILE* nocapture) nounwind
[all...] |
| /external/llvm/test/Assembler/ |
| MultipleReturnValueType.ll | 5 declare %struct.S_102 @f_102() nounwind
|
| /external/llvm/test/Bitcode/ |
| arm32_neon_vcnt_upgrade.ll | 4 define <4 x i16> @vclz16(<4 x i16>* %A) nounwind {
12 define <8 x i8> @vcnt8(<8 x i8>* %A) nounwind {
20 declare <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16>) nounwind readnone
21 declare <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8>) nounwind readnone
|
