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  /external/llvm/test/CodeGen/Mips/
rdhwr-directives.ll 9 ; CHECK: rdhwr
tls.ll 26 ; STATIC: rdhwr $3, $29
54 ; STATIC: rdhwr $3, $29
  /bionic/libc/arch-mips/bionic/
__get_tls.c 33 "rdhwr %0,$29\n\t"
cacheflush.c 90 asm("rdhwr %0, $1" : "=r" (lineSize));
  /system/core/libpixelflinger/arch-mips/
t32cb16blend.S 42 DBG rdhwr $at,$2
76 DBG rdhwr $t8,$2
95 DBG rdhwr $at,$2
163 DBG rdhwr $t8,$2
259 DBG rdhwr $a0,$3
  /external/qemu/
qemu-timer.h 264 * binutils wants to use rdhwr only on mips32r2
272 "rdhwr %0, "rd"\n\t" \
279 /* On kernels >= 2.6.25 rdhwr <reg>, $2 and $3 are emulated */
  /system/core/libcutils/tests/memset_mips/
test_memset.c 8 * All systems must implement or emulate the rdhwr instruction to read
21 asm volatile (".set push; .set mips32r2; rdhwr %[res],$2; .set pop" : [res] "=r" (res) : : "memory");
  /external/llvm/lib/Target/Mips/
MipsSEISelDAGToDAG.cpp 409 RdhwrOpc = Mips::RDHWR;
418 SDNode *Rdhwr =
423 SDValue(Rdhwr, 0));
MipsInstrInfo.td 766 InstSE<(outs CPURegOperand:$rt), (ins RO:$rd), "rdhwr\t$rt, $rd", [],
    [all...]
  /external/llvm/lib/Target/Mips/InstPrinter/
MipsInstPrinter.cpp 82 case Mips::RDHWR:
96 case Mips::RDHWR:
  /external/llvm/test/MC/Mips/
mips-alu-instructions.s 95 # CHECK: rdhwr $5, $29
116 rdhwr $5, $29
mips64-alu-instructions.s 86 # CHECK: rdhwr $5, $29
105 rdhwr $5, $29
  /bionic/libc/private/
bionic_tls.h 101 " rdhwr %0,$29\n" \
  /frameworks/native/opengl/libs/GLES2/
gl2.cpp 74 "rdhwr %[tls], $29\n\t" \
  /external/oprofile/events/mips/24K/
events.h 81 "46-0 Stall cycles due to return data from MFC0 and RDHWR instructions"},
events 64 event:0x2e counters:0 um:zero minimum:500 name:INTERLOCK_STALLS : 46-0 Stall cycles due to return data from MFC0 and RDHWR instructions
  /frameworks/native/opengl/libs/EGL/
getProcAddress.cpp 71 "rdhwr %[tls], $29\n\t" \
  /frameworks/native/opengl/libs/GLES_CM/
gl.cpp 126 "rdhwr %[tls], $29\n\t" \
  /external/oprofile/events/mips/1004K/
events.h 89 "46-0 Stall cycles due to return data from MFC0, RDHWR, and MFTR instructions"},
events 69 event:0x2e counters:0 um:zero minimum:500 name:INTERLOCK_STALLS : 46-0 Stall cycles due to return data from MFC0, RDHWR, and MFTR instructions
  /external/oprofile/events/mips/34K/
events.h 87 "46-0 Stall cycles due to return data from MFC0, RDHWR, and MFTR instructions"},
events 68 event:0x2e counters:0 um:zero minimum:500 name:INTERLOCK_STALLS : 46-0 Stall cycles due to return data from MFC0, RDHWR, and MFTR instructions
  /external/llvm/test/MC/Disassembler/Mips/
mips32.txt 433 # CHECK: rdhwr $5, $29
mips32_le.txt 439 # CHECK: rdhwr $5, $29
  /external/valgrind/main/VEX/priv/
guest_mips_toIR.c     [all...]

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