| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
|
| /external/chromium_org/skia/ext/ |
| convolver_mips_dspr2.cc | 73 "addiu $t7, $t7, -1 \n"
75 " addiu %[fx], %[fx], 8 \n"
95 "addiu $t7, $t7, -1 \n"
97 " addiu %[fx], %[fx], 2 \n"
177 "addiu $t7, $t7, -1 \n"
179 " addiu %[fx], %[fx], 8 \n"
197 "addiu $t7, $t7, -1 \n"
199 " addiu %[fx], %[fx], 2 \n"
300 "addiu %[cnt], %[cnt], -1 \n"
302 " addiu %[fy], %[fy], 8 \n
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| largeimmprinting.ll | 12 ; 32: addiu $[[R0]], $[[R0]], -24
|
| o32_cc_byval.ll | 14 ; CHECK: addiu $[[R0:[0-9]+]], $[[R1]], %lo(f1.s1)
46 ; CHECK: addiu $sp, $sp, -48
83 ; CHECK: addiu $sp, $sp, -48
102 ; CHECK: addiu $sp, $sp, -48
|
| return-vector.ll | 35 ; CHECK: addiu $4, $sp, 32
61 ; CHECK: addiu $4, $sp, 16
83 ; CHECK: addiu $4, $sp, 32
216 ; CHECK: addiu $2, $zero, 0
217 ; CHECK: addiu $3, $zero, 1
218 ; CHECK: addiu $4, $zero, 2
219 ; CHECK: addiu $5, $zero, 3
|
| cmov.ll | 9 ; O32-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
26 ; O32: addiu $[[R1:[0-9]+]], ${{[a-z0-9]+}}, %got(d)
27 ; O32: addiu $[[R0:[0-9]+]], ${{[a-z0-9]+}}, %got(c)
|
| eh.ll | 9 ; CHECK-EL: addiu $sp, $sp
|
| inlineasmmemop.ll | 8 ; CHECK: addiu $[[T0:[0-9]+]], $sp
|
| llcarry.ll | 42 ; 16: addiu ${{[0-9]+}}, 15
|
| alloca.ll | 40 ; CHECK: addiu $4, $[[T0]], 40
50 ; CHECK: addiu $4, $[[T0]], 12
|
| atomic.ll | 113 ; CHECK-EL: addiu $[[R1:[0-9]+]], $zero, -4
138 ; CHECK-EB: addiu $[[R1:[0-9]+]], $zero, -4
170 ; CHECK-EL: addiu $[[R1:[0-9]+]], $zero, -4
195 ; CHECK-EB: addiu $[[R1:[0-9]+]], $zero, -4
227 ; CHECK-EL: addiu $[[R1:[0-9]+]], $zero, -4
253 ; CHECK-EB: addiu $[[R1:[0-9]+]], $zero, -4
286 ; CHECK-EL: addiu $[[R1:[0-9]+]], $zero, -4
310 ; CHECK-EB: addiu $[[R1:[0-9]+]], $zero, -4
341 ; CHECK-EL: addiu $[[R1:[0-9]+]], $zero, -4
370 ; CHECK-EB: addiu $[[R1:[0-9]+]], $zero, -
[all...] |
| /external/llvm/test/MC/Mips/ |
| micromips-alu-instructions.s | 9 # CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0x26,0x31]
11 # CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0x26,0x31]
40 addiu $9, $6,-15001
|
| mips-expansions.s | 8 # CHECK: addiu $6, $zero, -2345 # encoding: [0xd7,0xf6,0x06,0x24]
11 # CHECK: addiu $4, $zero, 20 # encoding: [0x14,0x00,0x04,0x24]
14 # CHECK: addiu $4, $5, 20 # encoding: [0x14,0x00,0xa4,0x24]
|
| mips-alu-instructions.s | 76 # CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x24]
79 # CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0xc9,0x24]
80 # CHECK: addiu $11, $11, 40 # encoding: [0x28,0x00,0x6b,0x25]
102 addiu $9,$6,-15001
103 addiu $11,40
|
| /bionic/libc/arch-mips/string/ |
| memset.S | 211 addiu a0,a0,64
250 addiu a0,a0,64
284 addiu a0,a0,32
294 addiu a0,a0,4
307 addiu a0,a0,1
|
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.td | 116 // target constant nodes that would otherwise remain unchanged with ADDiu
343 // e.g. addiu, sltiu
[all...] |
| MicroMipsInstrInfo.td | 3 def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>,
|
| /external/valgrind/main/coregrind/m_dispatch/ |
| dispatch-mips32-linux.S | 67 addiu $29, -56
140 addiu $29, 56 /* stack_size */
160 addiu $3, $3, -16
175 addiu $3, $3, -16
185 addiu $13, $13, 0x1
218 addiu $13, $13, 0x1
|
| /external/kernel-headers/original/asm-mips/ |
| asm.h | 257 #define INT_ADDIU addiu
294 #define LONG_ADDIU addiu
341 #define PTR_ADDIU addiu
|
| /external/valgrind/main/none/tests/mips32/ |
| round.c | 136 "addiu $t0, 1\n\t"
143 "addiu $t0, 2\n\t"
150 "addiu $t0, 3\n\t"
|
| MemCpyTest.c | 48 "addiu $v0, $v0, 4\n\t"
|
| /external/valgrind/main/helgrind/tests/ |
| tc07_hbl1.c | 83 " addiu $9, $9, 1\n" \
|
