| /external/llvm/lib/CodeGen/ |
| LexicalScopes.cpp | 55 /// extractLexicalScopes - Extract instruction ranges for each lexical scopes
61 // Scan each instruction and create scopes. First build working set of scopes.
71 // Check if instruction has valid location information.
78 // If scope has not changed then skip this instruction.
84 // Ignore DBG_VALUE. It does not contribute to any instruction in output.
89 // If we have already seen a beginning of an instruction range and
90 // current instruction scope does not match scope of first instruction
91 // in this range then create a new instruction range.
97 // This is a beginning of a new instruction range
[all...] |
| TwoAddressInstructionPass.cpp | 1 //===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
10 // This file implements the TwoAddress instruction pass which is used
26 // address instruction is removed.
165 "Two-Address instruction pass", false, false)
168 "Two-Address instruction pass", false, false)
174 /// sink3AddrInstruction - A two-address instruction has been converted to a
175 /// three-address instruction to avoid clobbering a register. Try to sink it
176 /// past the instruction that would kill the above mentioned register to reduce
182 // instruction? After this transformation is done, we no longer need
183 // the instruction to be in three-address form
[all...] |
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 578 case Instruction::GetElementPtr: {
588 case Instruction::Trunc: {
594 case Instruction::ZExt: {
600 case Instruction::SExt: {
606 case Instruction::FPTrunc: {
612 case Instruction::FPExt:{
618 case Instruction::UIToFP: {
633 case Instruction::SIToFP: {
648 case Instruction::FPToUI: // double->APInt conversion handles sign
649 case Instruction::FPToSI:
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILPeepholeOptimizer.cpp | 53 // Function to initiate all of the instruction level optimizations.
73 // Run a series of tests to see if we can optimize a CALL instruction.
76 bool optimizeBitExtract(Instruction *inst);
78 bool optimizeBitInsert(Instruction *inst);
79 bool setupBitInsert(Instruction *base,
80 Instruction *&src,
83 // Expand the bit field insert instruction on versions of OpenCL that
86 // Expand the bit field mask instruction on version of OpenCL that
105 bool correctMisalignedMemOp(Instruction *inst);
300 Instruction *inst = (*bbb)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SlotIndexes.h | 112 /// the same instruction (Slot_Register or Slot_EarlyClobber), but isn't
205 /// isSameInstr - Return true if A and B refer to the same instruction.
210 /// isEarlierInstr - Return true if A refers to an instruction earlier than
222 /// slots on the same instruction have zero distance.
242 /// is the one associated with the Slot_Block slot for the instruction
249 /// index is the one associated with the Slot_Block slot for the instruction
255 /// Returns the register use/def slot in the current instruction for a
261 /// Returns the dead def kill slot for the current instruction.
267 /// next slot for the instruction pointed to by this index or, if this
268 /// index is a STORE, the first slot for the next instruction
[all...] |
| /external/llvm/tools/llvm-stress/ |
| llvm-stress.cpp | 20 #include "llvm/IR/Instruction.h"
133 /// Add a new instruction.
334 Instruction* Term = BB->getTerminator();
336 Instruction::BinaryOps Op;
340 case 0:{Op = (isFloat?Instruction::FAdd : Instruction::Add); break; }
341 case 1:{Op = (isFloat?Instruction::FSub : Instruction::Sub); break; }
342 case 2:{Op = (isFloat?Instruction::FMul : Instruction::Mul); break;
[all...] |
| /dalvik/vm/analysis/ |
| DexVerify.cpp | 67 * Compute the width of the instruction at each address in the instruction
69 * middle of an instruction, or that are part of switch table data, are not
76 * - opcode of first instruction begins at index 0
78 * - each instruction follows the last
79 * - last byte of last instruction is at (code_length-1)
97 LOG_VFY_METH(meth, "VFY: invalid instruction (0x%04x)", *insns);
166 "VFY: 'try' block starts inside an instruction (%d)",
215 * (1) Walk through all code units, determining instruction locations,
230 * - opcode of first instruction begins at index
[all...] |
| /external/v8/src/arm/ |
| constants-arm.h | 183 // Instruction objects are pointers to 32bit values, and provide methods to
223 // Instruction encoding bits and masks.
230 A = 1 << 21, // Accumulate in multiply instruction (or not).
257 // Instruction bit masks.
260 kRdMask = 15 << 12, // In str instruction.
269 // Addressing modes and instruction variants.
445 // add(sp, sp, 4) instruction (aka Pop())
448 // str(r, MemOperand(sp, 4, NegPreIndex), al) instruction (aka push(r))
452 // ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r))
495 // Instruction abstraction
[all...] |
| /art/compiler/dex/quick/ |
| local_optimizations.cc | 41 /* Convert a more expensive instruction (ie load) into a move */
47 * Insert the converted instruction after the original since the
48 * optimization is scannng in the top-down order and the new instruction
56 * Perform a pass of top-down walk, from the second-last instruction in the
126 * Add pc to the resource mask to prevent this instruction
158 * Should only see literal loads in the instruction
256 * since the instruction list is scanned in the
271 * Perform a pass of bottom-up walk, from the second instruction in the
287 /* Start from the second instruction */
363 * Store the dependent or non-pseudo/indepedent instruction to th
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| Insn.java | 27 * A register-based instruction. An instruction is the combination of
39 /** {@code null-ok;} spec for the result of this instruction, if any */
42 /** {@code non-null;} specs for all the sources of this instruction */
141 * means this instruction returns nothing.
151 * instruction, or null if no local variable assignment occurs. This
188 * Gets whether this instruction can possibly throw an exception. This
191 * @return {@code true} iff this instruction can possibly throw
199 * StdTypeList#EMPTY} if this instruction has no handlers,
200 * which can be <i>either</i> if this instruction can't possibl
[all...] |
| /dalvik/dx/src/com/android/dx/rop/code/ |
| Insn.java | 25 * A register-based instruction. An instruction is the combination of
37 /** {@code null-ok;} spec for the result of this instruction, if any */
40 /** {@code non-null;} specs for all the sources of this instruction */
139 * means this instruction returns nothing.
149 * instruction, or null if no local variable assignment occurs. This
186 * Gets whether this instruction can possibly throw an exception. This
189 * @return {@code true} iff this instruction can possibly throw
197 * StdTypeList#EMPTY} if this instruction has no handlers,
198 * which can be <i>either</i> if this instruction can't possibl
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| Insn.java | 25 * A register-based instruction. An instruction is the combination of
37 /** {@code null-ok;} spec for the result of this instruction, if any */
40 /** {@code non-null;} specs for all the sources of this instruction */
139 * means this instruction returns nothing.
149 * instruction, or null if no local variable assignment occurs. This
186 * Gets whether this instruction can possibly throw an exception. This
189 * @return {@code true} iff this instruction can possibly throw
197 * StdTypeList#EMPTY} if this instruction has no handlers,
198 * which can be <i>either</i> if this instruction can't possibl
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| AliasSetTracker.h | 113 std::vector<AssertingVH<Instruction> > UnknownInsts;
148 Instruction *getUnknownInst(unsigned i) const {
254 void addUnknownInst(Instruction *I, AliasAnalysis &AA);
255 void removeUnknownInst(Instruction *I) {
271 bool aliasesUnknownInst(Instruction *Inst, AliasAnalysis &AA) const;
313 /// instructions to the alias sets. Adding a new instruction can result in
316 /// 1. If the instruction doesn't alias any other sets, create a new set.
317 /// 2. If the instruction aliases exactly one set, add it to the set
318 /// 3. If the instruction aliases multiple sets, merge the sets, and add
319 /// the instruction to the result
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXUtilities.cpp | 406 if (Instruction *I = dyn_cast<Instruction>(v))
416 if (Instruction *I = dyn_cast<Instruction>(v))
440 // Find an instruction by name
441 Instruction *llvm::getInst(Value *base, char *instName) {
447 Instruction *I = &*it;
456 // Dump an instruction by nane
458 Instruction *I = getInst(base, instName);
463 // Dump an instruction and all dependent instruction
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| invalid-thumbv7.txt | 21 # CHECK: warning: invalid instruction encoding
32 # CHECK: invalid instruction encoding
41 # CHECK: invalid instruction encoding
50 # CHECK: potentially undefined instruction encoding
55 # CHECK: invalid instruction encoding
60 # CHECK: potentially undefined instruction encoding
62 # CHECK: potentially undefined instruction encoding
71 # CHECK: potentially undefined instruction encoding
107 # CHECK: potentially undefined instruction encoding
117 # CHECK: invalid instruction encodin
[all...] |
| /art/compiler/dex/quick/mips/ |
| codegen_mips.h | 30 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
87 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
95 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
100 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest,
102 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest,
104 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
106 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| BlockAddresses.java | 28 * start address, end address, and last instruction address.
35 /** {@code non-null;} array containing addresses for the final instruction
40 * final instruction) of each basic block (indexed by basic block
81 * Gets the instance for the final instruction of the given block.
91 * Gets the instance for the final instruction of the block with
102 * Gets the instance for the end (address after the final instruction)
113 * Gets the instance for the end (address after the final instruction)
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| BlockAddresses.java | 28 * start address, end address, and last instruction address.
35 /** {@code non-null;} array containing addresses for the final instruction
40 * final instruction) of each basic block (indexed by basic block
81 * Gets the instance for the final instruction of the given block.
91 * Gets the instance for the final instruction of the block with
102 * Gets the instance for the end (address after the final instruction)
113 * Gets the instance for the end (address after the final instruction)
|
| /external/chromium/sdch/open-vcdiff/src/ |
| codetable.h | 29 // The instruction types from section 5.5 (mistakenly labeled 5.4) of the RFC.
37 // The following values are not true instruction types, but rather
55 // as described in Section 7 of RFC 3284. Each instruction code
61 // the size will be encoded separately from the instruction code, as a Varint
84 // max_mode is the maximum value for the mode of a COPY instruction;
94 // (Instruction Codes), which contains the following specification:
96 // Each instruction code entry contains six fields, each of which is a single
|
| /external/chromium_org/sandbox/win/src/sidestep/ |
| mini_disassembler.h | 31 // can figure out where the next instruction starts, and whether it
40 // Instruction Set Reference for information about operand decoding
57 // Attempts to disassemble a single instruction starting from the
62 // the length in bytes of the instruction.
107 // The instruction type we have decoded from the opcode.
111 // the current instruction (note: we don't care about how large
115 // True iff there is a ModR/M byte in this instruction.
|
| /external/chromium_org/sdch/open-vcdiff/src/ |
| codetable.h | 29 // The instruction types from section 5.5 (mistakenly labeled 5.4) of the RFC.
37 // The following values are not true instruction types, but rather
55 // as described in Section 7 of RFC 3284. Each instruction code
61 // the size will be encoded separately from the instruction code, as a Varint
84 // max_mode is the maximum value for the mode of a COPY instruction;
94 // (Instruction Codes), which contains the following specification:
96 // Each instruction code entry contains six fields, each of which is a single
|
| /external/chromium_org/tools/memory_watcher/ |
| mini_disassembler.h | 39 // can figure out where the next instruction starts, and whether it
48 // Instruction Set Reference for information about operand decoding
65 // Attempts to disassemble a single instruction starting from the
70 // the length in bytes of the instruction.
114 // The instruction type we have decoded from the opcode.
118 // the current instruction (note: we don't care about how large
122 // True iff there is a ModR/M byte in this instruction.
|
| /external/chromium_org/tools/traceline/traceline/sidestep/ |
| mini_disassembler.h | 31 // can figure out where the next instruction starts, and whether it
40 // Instruction Set Reference for information about operand decoding
57 // Attempts to disassemble a single instruction starting from the
62 // the length in bytes of the instruction.
107 // The instruction type we have decoded from the opcode.
111 // the current instruction (note: we don't care about how large
115 // True iff there is a ModR/M byte in this instruction.
|
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| BlockAddresses.java | 28 * start address, end address, and last instruction address.
35 /** {@code non-null;} array containing addresses for the final instruction
40 * final instruction) of each basic block (indexed by basic block
81 * Gets the instance for the final instruction of the given block.
91 * Gets the instance for the final instruction of the block with
102 * Gets the instance for the end (address after the final instruction)
113 * Gets the instance for the end (address after the final instruction)
|
| /external/llvm/bindings/python/llvm/ |
| disassembler.py | 60 """Obtain the next instruction from an input source.
72 long number of bytes read. 0 if no instruction was read.
73 str representation of instruction. This will be the assembly that
74 represents the instruction.
93 long address of instruction.
94 long size of instruction, in bytes.
95 str representation of instruction.
|
