HomeSort by relevance Sort by last modified time
    Searched full:instruction (Results 651 - 675 of 5835) sorted by null

<<21222324252627282930>>

  /external/oprofile/events/ppc64/ibm-compat-v1/
events 28 event:0X0020 counters:0 um:zero minimum:1000 name:PM_FPU_FLOP_GRP2 : (Group 2 pm_compat_utilization2) FPU executed 1FLOP, FMA, FSQRT or FDIV instruction
40 event:0X0040 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP4 : (Group 4 pm_compat_l1_dcache_load_store_miss) Instruction completed
46 event:0X0050 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP5 : (Group 5 pm_compat_l1_cache_load) Instruction completed
51 #Group 6 pm_compat_instruction_directory, Instruction Directory
54 event:0X0062 counters:2 um:zero minimum:10000 name:PM_INST_CMPL_GRP6 : (Group 6 pm_compat_instruction_directory) Instruction completed
55 event:0X0063 counters:3 um:zero minimum:1000 name:PM_ITLB_MISS_GRP6 : (Group 6 pm_compat_instruction_directory) Instruction TLB misses
64 event:0X0080 counters:0 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP8 : (Group 8 pm_compat_cpi_1plus_ppc) One or more PPC instruction completed
67 event:0X0083 counters:3 um:zero minimum:1000 name:PM_1PLUS_PPC_DISP_GRP8 : (Group 8 pm_compat_cpi_1plus_ppc) Cycles at least one instruction dispatched
70 event:0X0090 counters:0 um:zero minimum:10000 name:PM_INST_CMPL_GRP9 : (Group 9 pm_compat_misc_events1) Instruction completed
  /external/chromium_org/v8/src/mips/
simulator-mips.cc 78 void Stop(Instruction* instr);
99 bool SetBreakpoint(Instruction* breakpc);
100 bool DeleteBreakpoint(Instruction* breakpc);
125 void MipsDebugger::Stop(Instruction* instr) {
144 // Overwrite the instruction and address with nops.
148 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstructionSize);
154 #define UNSUPPORTED() printf("Unsupported instruction.\n");
159 void MipsDebugger::Stop(Instruction* instr) {
164 Instruction::kInstrSize);
170 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize)
    [all...]
  /external/llvm/lib/Transforms/Scalar/
GVN.cpp 113 Expression create_expression(Instruction* I);
162 Expression ValueTable::create_expression(Instruction *I) {
166 for (Instruction::op_iterator OI = I->op_begin(), OE = I->op_end();
174 assert(I->getNumOperands() == 2 && "Unsupported commutative instruction!");
199 assert((Opcode == Instruction::ICmp || Opcode == Instruction::FCmp) &&
229 e.opcode = Instruction::Add;
233 e.opcode = Instruction::Sub;
237 e.opcode = Instruction::Mul;
256 for (Instruction::op_iterator OI = EI->op_begin(), OE = EI->op_end()
    [all...]
  /external/v8/src/mips/
simulator-mips.cc 78 void Stop(Instruction* instr);
99 bool SetBreakpoint(Instruction* breakpc);
100 bool DeleteBreakpoint(Instruction* breakpc);
125 void MipsDebugger::Stop(Instruction* instr) {
144 // Overwrite the instruction and address with nops.
148 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstructionSize);
154 #define UNSUPPORTED() printf("Unsupported instruction.\n");
159 void MipsDebugger::Stop(Instruction* instr) {
164 Instruction::kInstrSize);
170 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize)
    [all...]
  /art/runtime/
globals.h 47 // ARM instruction alignment. ARM processors require code to be 4-byte aligned,
51 // MIPS instruction alignment. MIPS processors require code to be 4-byte aligned.
55 // X86 instruction alignment. This is the recommended alignment for maximum performance.
  /dalvik/dexgen/src/com/android/dexgen/dex/code/
LocalEnd.java 24 * Pseudo-instruction which is used to explicitly end the mapping of a
26 * class in an instruction stream indicates that starting with the
27 * subsequent instruction, the indicated variable is no longer valid.
LocalStart.java 24 * Pseudo-instruction which is used to introduce a new local variable. That
25 * is, an instance of this class in an instruction stream indicates that
26 * starting with the subsequent instruction, the indicated variable
  /dalvik/dexgen/src/com/android/dexgen/rop/code/
TranslationAdvice.java 28 * instruction with the given opcode operating on the given arguments,
31 * The instruction associated must have exactly two sources.
55 * For example, Dex bytecode does not have instruction forms that take
  /dalvik/dx/src/com/android/dx/dex/code/
LocalEnd.java 24 * Pseudo-instruction which is used to explicitly end the mapping of a
26 * class in an instruction stream indicates that starting with the
27 * subsequent instruction, the indicated variable is no longer valid.
LocalStart.java 24 * Pseudo-instruction which is used to introduce a new local variable. That
25 * is, an instance of this class in an instruction stream indicates that
26 * starting with the subsequent instruction, the indicated variable
  /dalvik/dx/src/com/android/dx/rop/code/
TranslationAdvice.java 28 * instruction with the given opcode operating on the given arguments,
31 * The instruction associated must have exactly two sources.
55 * For example, Dex bytecode does not have instruction forms that take
  /dalvik/vm/mterp/
Mterp.cpp 50 * If we're using computed goto instruction transitions, make sure
64 ALOGE("(did an instruction handler exceed %d bytes?)", width);
95 //ALOGI("first instruction is 0x%04x", self->interpSave.pc[0]);
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/tests/
radeon_compiler_util_tests.c 37 * CMP instruction. A previous version of this function was ignoring
57 * instruction share the same register file and index. Normally, we
60 * source selects that the presubtract instruction expects
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
SIInstrInfo.h 1 //===-- SIInstrInfo.h - SI Instruction Info Interface ---------------------===//
38 /// getEncodingType - Returns the encoding type of this instruction.
57 // First 4 bits are the instruction encoding
  /external/chromium_org/third_party/mesa/src/src/mesa/program/
prog_instruction.h 29 * Vertex/fragment program instruction datatypes and constants.
53 #define SWIZZLE_ZERO 4 /**< For SWZ instruction only */
54 #define SWIZZLE_ONE 5 /**< For SWZ instruction only */
109 * Instruction precision for GL_NV_fragment_program
142 * Program instruction opcodes for vertex, fragment and geometry programs.
254 * Instruction source register.
271 * instruction which allows per-component negation.
294 * Instruction destination register.
336 * Vertex/fragment program instruction.
345 * Indicates that the instruction should update the condition cod
    [all...]
  /external/dexmaker/src/dx/java/com/android/dx/dex/code/
LocalEnd.java 24 * Pseudo-instruction which is used to explicitly end the mapping of a
26 * class in an instruction stream indicates that starting with the
27 * subsequent instruction, the indicated variable is no longer valid.
LocalStart.java 24 * Pseudo-instruction which is used to introduce a new local variable. That
25 * is, an instance of this class in an instruction stream indicates that
26 * starting with the subsequent instruction, the indicated variable
  /external/dexmaker/src/dx/java/com/android/dx/rop/code/
TranslationAdvice.java 28 * instruction with the given opcode operating on the given arguments,
31 * The instruction associated must have exactly two sources.
55 * For example, Dex bytecode does not have instruction forms that take
  /external/javassist/src/main/javassist/bytecode/
CodeIterator.java 48 * Moves to the first instruction.
58 * <p>The index of the next instruction is set to the given index.
173 * Returns the index of the next instruction
201 * Moves to the instruction for
208 * <p>This method returns the index of INVOKESPECIAL instruction
211 * index of the next instruction following that INVOKESPECIAL.
215 * @return the index of the INVOKESPECIAL instruction, or -1
223 * Moves to the instruction for <code>super()</code>.
229 * <p>This method returns the index of INVOKESPECIAL instruction
232 * index of the next instruction following that INVOKESPECIAL
    [all...]
  /external/llvm/docs/HistoricalNotes/
2001-02-09-AdveCommentsResponse.txt 11 > essentially obvious from the instruction type:
16 > experience (e.g., in the br instruction), it doesn't seem to help as
38 should just use the instruction type as a hint, and that the
48 that will be added is an additional 'cast' instruction. I removed that
55 > There's a trade-off with the cast instruction:
57 > valid for the operands of each instruction (you probably have
123 > concern about an explicit 'icall' instruction?
126 now up in the instruction list next to 'call'.
129 > .NET has a tailcall instruction?
151 instruction... and I think that all predicated instructions can possibl
    [all...]
  /external/llvm/lib/Target/ARM/
ARMInstrInfo.h 1 //===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===//
30 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
38 /// such, whenever a client has an instance of instruction info, it should
Thumb1InstrInfo.h 1 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
29 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
37 /// such, whenever a client has an instance of instruction info, it should
  /external/llvm/lib/Target/Mips/
MipsAnalyzeImmediate.h 26 /// instruction in the sequence must be an ADDiu if LastInstrIsADDiu is
32 /// AddInstr - Add I to all instruction sequences in SeqLs.
53 /// GetShortestSeq - Find the shortest instruction sequence in SeqLs and
  /external/llvm/lib/Target/NVPTX/
NVPTXInstrFormats.td 1 //===- NVPTXInstrFormats.td - NVPTX Instruction Formats-------*- tblgen -*-===//
15 // Vector instruction type enum
24 : Instruction {
  /external/llvm/test/CodeGen/X86/
2009-09-10-LoadFoldingBug.ll 4 ; instruction. If done, the instruction does a 64-bit load and that's not
6 ; exception is when the instruction that folds the load is a move, then we

Completed in 874 milliseconds

<<21222324252627282930>>