| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600InstrInfo.h | 1 //===-- R600InstrInfo.h - R600 Instruction Info Interface -------*- C++ -*-===//
54 /// instruction slots within an instruction group.
113 ///hasFlagOperand - Returns true if this instruction has an operand for
123 ///getFlagOp - Return the operand containing the flags for this instruction.
126 ///clearFlag - Clear the specified flag on the instruction.
|
| /external/oprofile/events/arm/armv7/ |
| events | 15 event:0x4A counters:1,2,3,4 um:zero minimum:500 name:L1_INST_MISS : L1 instruction cache miss as a result of the hashing algorithm
21 event:0x50 counters:1,2,3,4 um:zero minimum:500 name:L1_INST : Any L1 instruction cache access, excluding CP15 cache accesses
26 event:0x55 counters:1,2,3,4 um:zero minimum:500 name:OP_EXECUTED : Number of operations executed (in instruction or mutli-cycle instruction)
27 event:0x56 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_INST_STALL : Cycles where no instruction available
30 event:0x59 counters:1,2,3,4 um:zero minimum:500 name:CYCLES_NEON_INST_STALL : Number of cycles the processor waits on NEON instruction queue or NEON load queue
|
| /external/oprofile/events/mips/25K/ |
| events | 14 event:0x8 counters:0,1 um:zero minimum:500 name:INSNS_COMPLETE : Instruction that completed execution (with or without exception)
30 event:0x10 counters:0,1 um:zero minimum:500 name:JR_COMPLETED : JR instruction that completed execution
36 event:0x12 counters:0,1 um:zero minimum:500 name:JTLB_MISSES_IFETCH : Raw count of Joint-TLB misses for instruction fetch
43 event:0x15 counters:0,1 um:zero minimum:500 name:JTLB_IFETCH_REFILL_EXCEPTIONS : Joint-TLB refill exceptions due to instruction fetch
45 event:0x17 counters:0,1 um:zero minimum:500 name:JTLB_REFILL_EXCEPTIONS : total Joint-TLB Instruction exceptions (refill)
51 event:0x19 counters:0,1 um:zero minimum:500 name:INSN_REQ_FROM_IFU_BIU : instruction requests from the IFU to the BIU
|
| /external/proguard/src/proguard/classfile/editor/ |
| VariableRemapper.java | 26 import proguard.classfile.instruction.*;
27 import proguard.classfile.instruction.visitor.InstructionVisitor;
123 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) {}
133 // Replace the instruction.
134 Instruction replacementInstruction =
|
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Format/ |
| Instruction3rc.java | 31 import org.jf.dexlib.Code.Instruction;
46 public static final Instruction.InstructionFactory Factory = new Factory();
85 throw new RuntimeException(String.format("%s index is too large. Use the %s instruction instead.",
134 public Instruction makeJumbo() {
143 private static class Factory implements Instruction.InstructionFactory {
144 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) {
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAddSub.cpp | 158 Value *simplify(Instruction *FAdd);
165 Value *performFactorization(Instruction *I);
178 void createInstPostProc(Instruction *NewInst);
181 Instruction *Instr;
351 Instruction *I = 0;
352 if (Val == 0 || !(I = dyn_cast<Instruction>(Val)))
357 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub) {
380 if (Opcode == Instruction::FSub)
392 if (I->getOpcode() == Instruction::FMul)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 250 // Get the instruction.
252 // Get the instruction's basic block.
258 // Get the instruction info.
356 // Discard the DYNALLOC instruction.
370 // Get the instruction.
372 // Get the instruction's basic block.
408 // Discard the pseudo instruction.
414 // Get the instruction.
416 // Get the instruction's basic block.
450 // Discard the pseudo instruction
[all...] |
| /external/proguard/lib/ |
| proguard.jar | |
| /external/chromium_org/v8/src/arm/ |
| simulator-arm.cc | 60 void Stop(Instruction* instr);
78 bool SetBreakpoint(Instruction* breakpc);
79 bool DeleteBreakpoint(Instruction* breakpc);
105 void ArmDebugger::Stop(Instruction* instr) {
110 reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
124 // Overwrite the instruction and address with nops.
126 reinterpret_cast<Instruction*>(msg_address)->SetInstructionBits(kNopInstr);
128 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize);
137 void ArmDebugger::Stop(Instruction* instr) {
142 + Instruction::kInstrSize)
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/ |
| DalvInsn.java | 47 * Makes a move instruction, appropriate and ideal for the given arguments.
81 * <p><b>Note:</b> In the unlikely event that an instruction takes
144 * Gets whether the address of this instruction is known.
154 * Gets the output address of this instruction, if it is known. This throws
188 * Gets the register list for this instruction.
208 * Gets the minimum distinct registers required for this instruction.
239 * Gets the instruction that is equivalent to this one, except that
252 * Gets the instruction prefix required, if any, to use in an expanded
277 * Gets the instruction suffix required, if any, to use in an expanded
296 * Gets the instruction that is equivalent to this one, except tha
[all...] |
| RopTranslator.java | 135 * objects per basic block (to the first and last instruction,
144 * extra instruction per block (for the locals state at the
258 * Choose and append an output instruction for each original
259 * instruction.
445 * given rop instruction. For insns that are commutative, have
449 * @param insn {@code non-null;} instruction in question
450 * @return {@code non-null;} the instruction's complete register list
458 * given rop instruction. For insns that are commutative, have
462 * @param insn {@code non-null;} instruction in question
464 * @return {@code non-null;} the instruction's complete register lis
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| DalvInsn.java | 48 * Makes a move instruction, appropriate and ideal for the given arguments.
82 * <p><b>Note:</b> In the unlikely event that an instruction takes
145 * Gets whether the address of this instruction is known.
155 * Gets the output address of this instruction, if it is known. This throws
189 * Gets the register list for this instruction.
209 * Gets the minimum distinct registers required for this instruction.
240 * Gets the instruction that is equivalent to this one, except that
253 * Gets the instruction prefix required, if any, to use in an expanded
278 * Gets the instruction suffix required, if any, to use in an expanded
297 * Gets the instruction that is equivalent to this one, except tha
[all...] |
| /external/llvm/include/llvm/Transforms/Utils/ |
| Local.h | 29 class Instruction;
50 /// ConstantFoldTerminator - If a terminator instruction is predicated on a
65 /// instruction is not used, and the instruction has no side effects.
67 bool isInstructionTriviallyDead(Instruction *I, const TargetLibraryInfo *TLI=0);
70 /// trivially dead instruction, delete it. If that makes any of its operands
78 /// either forms a cycle or is terminated by a trivially dead instruction,
155 /// Instruction and replaces it with a slot in the stack frame, allocated via
160 AllocaInst *DemoteRegToStack(Instruction &X,
162 Instruction *AllocaPoint = 0)
[all...] |
| /external/llvm/lib/IR/ |
| Dominators.cpp | 99 bool DominatorTree::dominates(const Instruction *Def,
100 const Instruction *User) const {
112 // An instruction doesn't dominate a use in itself.
116 // The value defined by an invoke dominates an instruction only if
117 // it dominates every instruction in UseBB.
118 // A PHI is dominated only if the instruction dominates every possible use
134 // true if Def would dominate a use in any instruction in UseBB.
136 bool DominatorTree::dominates(const Instruction *Def,
220 Instruction *UserInst = cast<Instruction>(U.getUser())
[all...] |
| /external/valgrind/main/exp-bbv/docs/ |
| bbv-manual.xml | 147 instead of just instruction counts. The
183 This option tells the tool to only display instruction count
185 This is useful for debugging, and for gathering instruction count
277 Then each native instruction in the block is instrumented to
278 call an instruction counting routine with a pointer to the block
283 At run-time, our instruction counting routines are called once
284 per native instruction. The relevant block info structure is accessed
285 and the block count and total instruction count is updated.
286 If the total instruction count overflows the interval size
295 actual hardware counts a rep-prefixed instruction
[all...] |
| /external/oprofile/events/ppc64/970MP/ |
| events | 27 event:0X0014 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP1 : (Group 1 pm_slice0) One or more PPC instruction completed
63 event:0X0050 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP5 : (Group 5 pm_fpu1) FPU executed FDIV instruction
64 event:0X0051 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP5 : (Group 5 pm_fpu1) FPU executed multiply-add instruction
65 event:0X0052 counters:2 um:zero minimum:1000 name:PM_FPU_FEST_GRP5 : (Group 5 pm_fpu1) FPU executed FEST instruction
68 event:0X0055 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP5 : (Group 5 pm_fpu1) FPU executed FSQRT instruction
77 event:0X0064 counters:4 um:zero minimum:1000 name:PM_FPU_ALL_GRP6 : (Group 6 pm_fpu2) FPU executed add, mult, sub, cmp or sel instruction
78 event:0X0065 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP6 : (Group 6 pm_fpu2) FPU executed store instruction
80 event:0X0067 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP6 : (Group 6 pm_fpu2) LSU executed Floating Point load instruction
102 #Group 9 pm_isu_flow, ISU Instruction Flow Events
123 event:0X00B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP11 : (Group 11 pm_fpu3) FPU0 executed FDIV instruction
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| LiveInterval.h | 12 // live interval for register v if there is no instruction with number j' >= j
13 // such that v is live at j' and there is no instruction with number i' < i such
50 /// The index of the defining instruction.
68 /// Returns true if this value is defined by a PHI instruction (or was,
229 /// the instruction that defines the value number.
331 /// used by an instruction at this SlotIndex position.
542 /// instruction. This class hides the implementation details of live ranges,
553 /// Create a LiveRangeQuery for the given live range and instruction index.
554 /// The sub-instruction slot of Idx doesn't matter, only the instruction i
[all...] |
| /external/v8/src/arm/ |
| simulator-arm.cc | 59 void Stop(Instruction* instr);
77 bool SetBreakpoint(Instruction* breakpc);
78 bool DeleteBreakpoint(Instruction* breakpc);
104 void ArmDebugger::Stop(Instruction* instr) {
109 reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
123 // Overwrite the instruction and address with nops.
125 reinterpret_cast<Instruction*>(msg_address)->SetInstructionBits(kNopInstr);
127 sim_->set_pc(sim_->get_pc() + 2 * Instruction::kInstrSize);
136 void ArmDebugger::Stop(Instruction* instr) {
141 + Instruction::kInstrSize)
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| EscapeAnalysis.java | 136 * Finds the corresponding instruction for a given move result
138 * @param moveInsn {@code non-null;} a move result instruction
139 * @return {@code non-null;} the instruction that produces the result for
149 * Finds the corresponding move result for a given instruction
151 * @param insn {@code non-null;} an instruction that must always be
153 * @return {@code non-null;} the move result for the given instruction
163 * instruction. The object being put is the child and the object being put
212 * Process a single instruction, looking for new objects resulting from
215 * @param insn {@code non-null;} instruction to process
244 * Determine the origin of a move result pseudo instruction that generate
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| EscapeAnalysis.java | 137 * Finds the corresponding instruction for a given move result
139 * @param moveInsn {@code non-null;} a move result instruction
140 * @return {@code non-null;} the instruction that produces the result for
150 * Finds the corresponding move result for a given instruction
152 * @param insn {@code non-null;} an instruction that must always be
154 * @return {@code non-null;} the move result for the given instruction
164 * instruction. The object being put is the child and the object being put
213 * Process a single instruction, looking for new objects resulting from
216 * @param insn {@code non-null;} instruction to process
245 * Determine the origin of a move result pseudo instruction that generate
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| TailRecursionElimination.cpp | 11 // by a return instruction with a branch to the entry of the function, creating
40 // return instruction. It's possible that there could be a jump between
97 CallInst *FindTRECandidate(Instruction *I,
113 bool CanMoveAboveCall(Instruction *I, CallInst *CI);
114 Value *CanTransformAccumulatorRecursion(Instruction *I, CallInst *CI);
265 /// instruction from after the call to before the call, assuming that all
266 /// instructions between the call and this instruction are movable.
268 bool TailCallElim::CanMoveAboveCall(Instruction *I, CallInst *CI) {
288 // Otherwise, if this is a side-effect free instruction, check to make sure
291 // the call, or movable instructions between the call and the instruction
[all...] |
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | 43 // CHECK-ERROR: error: invalid operand for instruction
55 // CHECK-ERROR: error: invalid operand for instruction
119 // CHECK-ERROR: error: invalid operand for instruction
122 // CHECK-ERROR-NEXT: error: invalid operand for instruction
125 // CHECK-ERROR-NEXT: error: invalid operand for instruction
128 // CHECK-ERROR-NEXT: error: invalid operand for instruction
135 // CHECK-ERROR: error: invalid operand for instruction
138 // CHECK-ERROR-NEXT: error: invalid operand for instruction
153 // CHECK-ERROR: error: invalid operand for instruction
156 // CHECK-ERROR-NEXT: error: invalid operand for instruction
[all...] |
| /external/oprofile/events/ppc64/970/ |
| events | 22 event:0X014 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP1 : (Group 1 pm_slice0) One or more PPC instruction completed
58 event:0X050 counters:0 um:zero minimum:1000 name:PM_FPU_FDIV_GRP5 : (Group 5 pm_fpu1) FPU executed FDIV instruction
59 event:0X051 counters:1 um:zero minimum:1000 name:PM_FPU_FMA_GRP5 : (Group 5 pm_fpu1) FPU executed multiply-add instruction
60 event:0X052 counters:2 um:zero minimum:1000 name:PM_FPU_FEST_GRP5 : (Group 5 pm_fpu1) FPU executed FEST instruction
63 event:0X055 counters:5 um:zero minimum:1000 name:PM_FPU_FSQRT_GRP5 : (Group 5 pm_fpu1) FPU executed FSQRT instruction
72 event:0X064 counters:4 um:zero minimum:1000 name:PM_FPU_ALL_GRP6 : (Group 6 pm_fpu2) FPU executed add, mult, sub, cmp or sel instruction
73 event:0X065 counters:5 um:zero minimum:1000 name:PM_FPU_STF_GRP6 : (Group 6 pm_fpu2) FPU executed store instruction
75 event:0X067 counters:7 um:zero minimum:1000 name:PM_LSU_LDF_GRP6 : (Group 6 pm_fpu2) LSU executed Floating Point load instruction
97 #Group 9 pm_isu_flow, ISU Instruction Flow Events
118 event:0X0B0 counters:0 um:zero minimum:1000 name:PM_FPU0_FDIV_GRP11 : (Group 11 pm_fpu3) FPU0 executed FDIV instruction
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| SimplifyCFG.cpp | 150 Instruction *Cond,
199 /// given instruction, which is assumed to be safe to speculate. 1 means
203 "Instruction is not safe to speculatively execute!");
208 case Instruction::GetElementPtr:
213 case Instruction::Load:
214 case Instruction::Add:
215 case Instruction::Sub:
216 case Instruction::And:
217 case Instruction::Or:
218 case Instruction::Xor
[all...] |
| /external/chromium_org/chrome/browser/profile_resetter/ |
| jtl_foundation.h | 65 // exists, the command execution returns from the current instruction.
72 // current instruction.
99 // instruction.
105 // returns from the current instruction.
112 // the program execution returns from the current instruction.
123 // current instruction.
131 // instruction.
141 // the current instruction.
149 // not match, the program execution returns from the current instruction.
156 // pattern, the program execution returns from the current instruction
[all...] |
