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  /libcore/luni/src/main/java/java/util/concurrent/
CyclicBarrier.java 210 // been interrupted, so this interrupt is deemed to
212 Thread.currentThread().interrupt();
282 * <li>Some other thread {@linkplain Thread#interrupt interrupts}
284 * <li>Some other thread {@linkplain Thread#interrupt interrupts}
293 * <li>is {@linkplain Thread#interrupt interrupted} while waiting
303 * <p>If any thread is {@linkplain Thread#interrupt interrupted} while waiting,
345 * <li>Some other thread {@linkplain Thread#interrupt interrupts}
347 * <li>Some other thread {@linkplain Thread#interrupt interrupts}
356 * <li>is {@linkplain Thread#interrupt interrupted} while waiting
370 * <p>If any thread is {@linkplain Thread#interrupt interrupted} whil
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FutureTask.java 38 * avoid surprising users about retaining interrupt status during
140 try { // in case call to interrupt throws exception
145 t.interrupt();
299 * Ensures that any interrupt from a possible cancel(true) is only
304 // chance to interrupt us. Let's spin-wait patiently.
307 Thread.yield(); // wait out pending interrupt
311 // We want to clear any interrupt we may have received from
315 // cancellation interrupt.
361 * Awaits completion or aborts on interrupt or timeout.
CountDownLatch.java 176 * zero, unless the thread is {@linkplain Thread#interrupt interrupted}.
186 * <li>Some other thread {@linkplain Thread#interrupt interrupts}
193 * <li>is {@linkplain Thread#interrupt interrupted} while waiting,
207 * zero, unless the thread is {@linkplain Thread#interrupt interrupted},
219 * <li>Some other thread {@linkplain Thread#interrupt interrupts}
230 * <li>is {@linkplain Thread#interrupt interrupted} while waiting,
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/
cyclades.h 183 __u32 clear_timer0_irq; /* Clear timer interrupt Register */
184 __u32 clear_timer1_irq; /* Clear timer interrupt Register */
185 __u32 clear_timer2_irq; /* Clear timer interrupt Register */
229 __u32 intr_ctrl_stat; /* 68h - Interrupt Control/Status */
312 /* interrupt enabling/status */
366 #define C_CM_INTBACK 0x42 /* Interrupt back */
370 #define C_CM_INTBACK2 0x46 /* Alternate Interrupt back */
374 #define C_CM_ACK_ENBL 0x54 /* enable acknowledged interrupt mode */
411 __u32 intr_enable; /* interrupt masking */
482 /* Host Interrupt Queue *
    [all...]
ppdev.h 67 /* Set control lines when an interrupt occurs. */
70 /* Clear (and return) interrupt count. */
serial.h 145 * Serial input interrupt line counters -- external structure
146 * Four lines can interrupt: CTS, DSR, RI, DCD
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/
cyclades.h 183 __u32 clear_timer0_irq; /* Clear timer interrupt Register */
184 __u32 clear_timer1_irq; /* Clear timer interrupt Register */
185 __u32 clear_timer2_irq; /* Clear timer interrupt Register */
229 __u32 intr_ctrl_stat; /* 68h - Interrupt Control/Status */
312 /* interrupt enabling/status */
366 #define C_CM_INTBACK 0x42 /* Interrupt back */
370 #define C_CM_INTBACK2 0x46 /* Alternate Interrupt back */
374 #define C_CM_ACK_ENBL 0x54 /* enable acknowledged interrupt mode */
411 __u32 intr_enable; /* interrupt masking */
482 /* Host Interrupt Queue *
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  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/
cyclades.h 183 __u32 clear_timer0_irq; /* Clear timer interrupt Register */
184 __u32 clear_timer1_irq; /* Clear timer interrupt Register */
185 __u32 clear_timer2_irq; /* Clear timer interrupt Register */
229 __u32 intr_ctrl_stat; /* 68h - Interrupt Control/Status */
312 /* interrupt enabling/status */
366 #define C_CM_INTBACK 0x42 /* Interrupt back */
370 #define C_CM_INTBACK2 0x46 /* Alternate Interrupt back */
374 #define C_CM_ACK_ENBL 0x54 /* enable acknowledged interrupt mode */
411 __u32 intr_enable; /* interrupt masking */
482 /* Host Interrupt Queue *
    [all...]
  /external/kernel-headers/original/asm-x86/
apicdef_32.h 175 /*0B0*/ struct { /* End Of Interrupt Register */
194 /*0F0*/ struct { /* Spurious Interrupt Vector Register */
212 /*200*/ struct { /* Interrupt Request Register */
250 /*300*/ struct { /* Interrupt Command Register 1 */
264 /*310*/ struct { /* Interrupt Command Register 2 */
ptrace.h 134 EF_VIF = 0x00080000, /* virtual interrupt */
135 EF_VIP = 0x00100000, /* virtual interrupt pending */
  /external/qemu/hw/
armv7m_nvic.c 2 * ARM Nested Vectored Interrupt Controller
18 interrupt lines. */
77 /* Trigger the interrupt. */
105 hw_error("Interrupt but no vector\n");
126 case 4: /* Interrupt Control Type. */
143 /* The interrupt in triggered when the timer reaches zero.
189 case 0xd0c: /* Application Interrupt/Reset Control. */
303 case 0xd04: /* Interrupt Control State. */
323 case 0xd0c: /* Application Interrupt/Reset Control. */
  /external/kernel-headers/original/asm-mips/pci/
bridge.h 134 /* Interrupt 0x000100-0x0001FF */
225 /* PCI Interrupt Acknowledge Cycle 0x030000 */
329 #define BRIDGE_INT_STATUS 0x000104 /* Interrupt Status */
330 #define BRIDGE_INT_ENABLE 0x00010C /* Interrupt Enables */
332 #define BRIDGE_INT_MODE 0x00011C /* Interrupt Mode */
333 #define BRIDGE_INT_DEVICE 0x000124 /* Interrupt Device */
369 #define BRIDGE_PCI_IACK 0x00030000 /* PCI Interrupt Ack */
486 /* Bridge interrupt status register bits definition */
551 /* Bridge interrupt enable register bits definition */
579 /* Bridge interrupt reset register bits definition *
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  /libcore/luni/src/main/java/java/util/concurrent/locks/
Condition.java 128 * Further, the ability to interrupt the actual suspension of the thread may
143 * to an interrupt over normal method return. This is true even if it can be
144 * shown that the interrupt occurred after another action that may have
154 * {@linkplain Thread#interrupt interrupted}.
165 * <li>Some other thread {@linkplain Thread#interrupt interrupts} the
177 * <li>is {@linkplain Thread#interrupt interrupted} while waiting
194 * <p>An implementation can favor responding to an interrupt over normal
224 * this method, or it is {@linkplain Thread#interrupt interrupted}
253 * <li>Some other thread {@linkplain Thread#interrupt interrupts} the
266 * <li>is {@linkplain Thread#interrupt interrupted} while waitin
    [all...]
  /hardware/invensense/60xx/mlsdk/mllite/
mldl.c 406 * @brief inv_get_dl_cfg_int configures the interrupt function on the specified pin.
407 * The basic interrupt signal characteristics can be set
413 * bitmask of triggers to enable for interrupt.
426 /* Mantis has 8 bits of interrupt config bits */
998 * @brief inv_get_interrupt_status returns the interrupt status from the specified
999 * interrupt pin.
1020 /*---- return the MPU interrupt status ----*/
1034 * @brief query the current status of an interrupt source.
1036 * index of the interrupt source.
1039 * @return 1 if the interrupt has been triggered
    [all...]
  /dalvik/vm/
Sync.h 104 * Implementation of Thread.interrupt().
106 * Interrupt a thread. If it's waiting on a monitor, wake it up.
  /external/chromium_org/chrome/browser/history/
download_database.h 60 // Returns true if able to successfully add the last interrupt reason and the
110 // interrupt reason |DOWNLOAD_INTERRUPT_REASON_CRASH|. This function
  /external/ganymed-ssh2/src/main/java/ch/ethz/ssh2/util/
TimeoutService.java 132 timeoutThread.interrupt();
151 timeoutThread.interrupt();
  /external/grub/netboot/
ni5010.c 72 #define IE_ISTAT (ioaddr + 0x13) /* IE Interrupt Status. read only */
78 /* bits in EDLC_XSTAT, interrupt clear on write, status when read */
103 /* bits in EDLC_RSTAT, interrupt clear on write, status when read */
113 #define RS_CLR_PKT_OK 0x80 /* clear rcvd packet interrupt */
163 #define IS_DMA_INT 0x04 /* =0 iff DMA done interrupt. */
164 #define IS_R_INT 0x02 /* =0 iff unmasked Rcv interrupt */
165 #define IS_X_INT 0x01 /* =0 iff unmasked Xmt interrupt */
203 outb(0, EDLC_RMASK); /* Disable all Rcv interrupt */
  /external/kernel-headers/original/linux/
ppdev.h 67 /* Set control lines when an interrupt occurs. */
70 /* Clear (and return) interrupt count. */
  /external/oprofile/module/x86/
op_rtc.c 43 /* read and ack the interrupt */
45 /* Is this my type of interrupt? */
  /external/qemu/
kqemu.h 87 uint64_t next_eip; /* next eip value when exiting with an interrupt */
134 #define KQEMU_RET_INT 0x0100 /* 8 low order bit are the interrupt */
  /frameworks/base/core/java/android/hardware/usb/
UsbEndpoint.java 27 * Interrupt endpoints are used for sending small amounts of data, typically events,
104 * <li>{@link UsbConstants#USB_ENDPOINT_XFER_INT} (interrupt endpoint)
  /frameworks/base/core/java/com/android/server/
ResettableTimeout.java 74 mThread.interrupt();
88 mThread.interrupt();
  /libcore/luni/src/main/java/java/nio/channels/
GatheringByteChannel.java 42 * operation is in progress. The interrupt state of the calling
80 * operation is in progress. The interrupt state of the calling
ScatteringByteChannel.java 42 * operation is in progress. The interrupt state of the calling
74 * operation is in progress. The interrupt state of the calling

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