| /prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
| tree-ssa-sccvn.h | 32 opcode, and a type. Result is the value number of the operation,
40 ENUM_BITFIELD(tree_code) opcode : 16; member in struct:vn_nary_op_s
67 They consist of an opcode, type, and some number of operands. For
68 a given opcode, some, all, or none of the operands may be used.
70 portion of the addressing calculation that opcode performs. */
74 enum tree_code opcode; member in struct:vn_reference_op_struct
|
| /external/chromium_org/third_party/sqlite/src/src/ |
| vdbe.c | 24 ** a linear sequence of operations. Each operation has an opcode
84 ** The next global variable is incremented each type the OP_Sort opcode
96 ** or MEM_Str that has been used by a VDBE opcode. The test procedures
111 ** The next global variable is incremented each type the OP_Found opcode
568 u64 start; /* CPU clock count at start of opcode */
569 int origPc; /* Program counter at start of opcode */
657 /* On any opcode with the "out2-prerelase" tag, free any
662 assert( pOp->opflags==sqlite3OpcodeProperty[pOp->opcode] );
704 switch( pOp->opcode ){
719 ** opcode and the opcodes.c file is filled with an array of strings wher
[all...] |
| /art/compiler/dex/ |
| mir_graph.cc | 282 switch (insn->dalvikInsn.opcode) {
307 LOG(FATAL) << "Unexpected opcode(" << insn->dalvikInsn.opcode << ") with kBranch set";
359 * int targets[size] branch targets, relative to switch opcode
363 if (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) {
375 * int targets[size] branch targets, relative to switch opcode
393 (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) ?
406 (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) ?
461 if (insn->dalvikInsn.opcode == Instruction::THROW) {
495 insn->dalvikInsn.opcode
584 Instruction::Code opcode = insn->dalvikInsn.opcode; local
743 int opcode = mir->dalvikInsn.opcode; local
884 int opcode = insn.opcode; local
[all...] |
| /dalvik/vm/compiler/ |
| Dataflow.cpp | 25 * instructions, where extended opcode at the MIR level are appended
825 Opcode opcode = insn->opcode; local
826 int dfAttributes = dvmCompilerDataFlowAttributes[opcode];
831 if ((int)opcode >= (int)kMirOpFirst) {
832 if ((int)opcode == (int)kMirOpPhi) {
836 sprintf(buffer, "Opcode %#x", opcode);
840 strcpy(buffer, dexGetOpcodeName(opcode));
927 int opcode = insn->opcode; local
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| RegOps.java | 24 * <p><b>Note:</b> Opcode descriptions use a rough pseudocode. {@code r}
43 * <b>Note:</b> This opcode should only ever be used in the
284 * <b>Note:</b> This opcode should only ever be used in the
291 * <b>Note:</b> This opcode should only ever be used in the
307 * Gets the name of the given opcode.
309 * @param opcode {@code >= 0, <= 255;} the opcode
312 public static String opName(int opcode) {
313 switch (opcode) {
372 return "unknown-" + Hex.u1(opcode);
[all...] |
| /dalvik/dx/src/com/android/dx/rop/code/ |
| RegOps.java | 24 * <p><b>Note:</b> Opcode descriptions use a rough pseudocode. {@code r}
43 * <b>Note:</b> This opcode should only ever be used in the
284 * <b>Note:</b> This opcode should only ever be used in the
291 * <b>Note:</b> This opcode should only ever be used in the
307 * Gets the name of the given opcode.
309 * @param opcode the opcode
312 public static String opName(int opcode) {
313 switch (opcode) {
372 return "unknown-" + Hex.u1(opcode);
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| LocalOptimizations.cpp | 103 isPseudoOpcode(thisLIR->opcode) ||
104 !(EncodingMap[thisLIR->opcode].flags & (IS_LOAD | IS_STORE))) {
109 bool isThisLIRLoad = EncodingMap[thisLIR->opcode].flags & IS_LOAD;
149 bool isCheckLIRLoad = EncodingMap[checkLIR->opcode].flags &
156 assert(!(EncodingMap[checkLIR->opcode].flags &
292 isPseudoOpcode(thisLIR->opcode) ||
293 !(EncodingMap[thisLIR->opcode].flags & IS_LOAD)) {
361 if (stopHere || !isPseudoOpcode(checkLIR->opcode)) {
391 if (!isPseudoOpcode(depLIR->opcode) &&
392 (EncodingMap[depLIR->opcode].flags & IS_LOAD))
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| LocalOptimizations.cpp | 103 isPseudoOpCode(thisLIR->opcode) ||
104 !(EncodingMap[thisLIR->opcode].flags & (IS_LOAD | IS_STORE))) {
109 bool isThisLIRLoad = EncodingMap[thisLIR->opcode].flags & IS_LOAD;
149 bool isCheckLIRLoad = EncodingMap[checkLIR->opcode].flags &
156 assert(!(EncodingMap[checkLIR->opcode].flags &
292 isPseudoOpCode(thisLIR->opcode) ||
293 !(EncodingMap[thisLIR->opcode].flags & IS_LOAD)) {
361 if (stopHere || !isPseudoOpCode(checkLIR->opcode)) {
391 if (!isPseudoOpCode(depLIR->opcode) &&
392 (EncodingMap[depLIR->opcode].flags & IS_LOAD))
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| RegOps.java | 24 * <p><b>Note:</b> Opcode descriptions use a rough pseudocode. {@code r}
43 * <b>Note:</b> This opcode should only ever be used in the
284 * <b>Note:</b> This opcode should only ever be used in the
291 * <b>Note:</b> This opcode should only ever be used in the
307 * Gets the name of the given opcode.
309 * @param opcode the opcode
312 public static String opName(int opcode) {
313 switch (opcode) {
372 return "unknown-" + Hex.u1(opcode);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 94 int Offset, unsigned Base, bool BaseKill, int Opcode,
107 int Opcode,
114 int Opcode, unsigned Size,
137 static int getLoadStoreMultipleOpcode(int Opcode, ARM_AM::AMSubMode Mode) {
138 switch (Opcode) {
139 default: llvm_unreachable("Unhandled opcode!");
208 AMSubMode getLoadStoreMultipleSubMode(int Opcode) {
209 switch (Opcode) {
210 default: llvm_unreachable("Unhandled opcode!");
285 int Opcode, ARMCC::CondCodes Pred
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600InstrInfo.cpp | 96 bool R600InstrInfo::isMov(unsigned Opcode) const {
99 switch(Opcode) {
110 // an opcode falls into this category.
111 bool R600InstrInfo::isPlaceHolderOpcode(unsigned Opcode) const {
112 switch (Opcode) {
119 bool R600InstrInfo::isReductionOp(unsigned Opcode) const {
123 bool R600InstrInfo::isCubeOp(unsigned Opcode) const {
124 switch(Opcode) {
134 bool R600InstrInfo::isALUInstr(unsigned Opcode) const {
135 unsigned TargetFlags = get(Opcode).TSFlags
[all...] |
| R600ExpandSpecialInstrs.cpp | 76 // The native opcode used by PRED_X is stored as an immediate in the
79 MI.getOperand(2).getImm(), // opcode
192 unsigned Opcode = BMI->getOpcode();
196 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0))
199 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1))
288 unsigned Opcode = MI.getOpcode();
289 switch (Opcode) {
291 Opcode = AMDGPU::CUBE_r600_real;
294 Opcode = AMDGPU::CUBE_eg_real;
301 TII->buildDefaultInstruction(MBB, I, Opcode, DstReg, Src0, Src1)
[all...] |
| /external/chromium-trace/trace-viewer/third_party/pywebsocket/src/test/ |
| test_mux.py | 90 opcode, payload, fin, rsv1, rsv2, rsv3 = (
96 if opcode == common.OPCODE_CONTINUATION:
97 raise Exception('Sending invalid continuation opcode')
98 self._current_opcode = opcode
100 if opcode != common.OPCODE_CONTINUATION:
101 raise Exception('Sending invalid opcode %d' % opcode)
125 raise Exception('Sending invalid continuation opcode')
129 raise Exception('Sending invalid opcode %d' % inner_opcode)
141 {'opcode': channel_data.current_opcode
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| programopt.c | 90 newInst[i].Opcode = OPCODE_DP4;
162 newInst[0].Opcode = OPCODE_MUL;
174 newInst[i].Opcode = OPCODE_MAD;
189 newInst[3].Opcode = OPCODE_MAD;
301 if (inst->Opcode == OPCODE_END)
313 assert(inst->Opcode == OPCODE_END); /* we'll overwrite this inst */
321 inst->Opcode = OPCODE_MAD;
342 inst->Opcode = OPCODE_MUL;
356 inst->Opcode = OPCODE_MUL;
369 inst->Opcode = OPCODE_EX2
[all...] |
| /external/mesa3d/src/mesa/program/ |
| programopt.c | 90 newInst[i].Opcode = OPCODE_DP4;
162 newInst[0].Opcode = OPCODE_MUL;
174 newInst[i].Opcode = OPCODE_MAD;
189 newInst[3].Opcode = OPCODE_MAD;
301 if (inst->Opcode == OPCODE_END)
313 assert(inst->Opcode == OPCODE_END); /* we'll overwrite this inst */
321 inst->Opcode = OPCODE_MAD;
342 inst->Opcode = OPCODE_MUL;
356 inst->Opcode = OPCODE_MUL;
369 inst->Opcode = OPCODE_EX2
[all...] |
| /art/runtime/ |
| disassembler_mips.cc | 179 std::string opcode; local
185 opcode = StringPrintf("op=%d fn=%d", op, function);
189 opcode = gMipsInstructions[i].name;
209 case 0: opcode += ".s"; break;
210 case 1: opcode += ".d"; break;
211 case 4: opcode += ".w"; break;
212 case 5: opcode += ".l"; break;
213 case 6: opcode += ".ps"; break;
214 default: opcode += ".?"; break;
257 os << StringPrintf("%p: %08x\t%-7s ", instr_ptr, instruction, opcode.c_str()) << args.str() << '\n'
[all...] |
| /external/chromium/sdch/open-vcdiff/src/ |
| encodetable.h | 88 // Encode an ADD opcode with the "size" bytes starting at data
91 // Encode a COPY opcode with args "offset" (into dictionary) and "size" bytes.
94 // Encode a RUN opcode for "size" copies of the value "byte".
133 // Determines the best opcode to encode an instruction, and appends
134 // or substitutes that opcode and its size into the
164 // of the first and second instruction in the opcode.
196 // The instruction map facilitates finding an opcode quickly given an
203 // that contains the last single-instruction opcode generated by
208 // either no opcodes have been generated yet, or else the last opcode
209 // generated was a double-instruction opcode
[all...] |
| /external/chromium_org/sdch/open-vcdiff/src/ |
| encodetable.h | 93 // Encode an ADD opcode with the "size" bytes starting at data
96 // Encode a COPY opcode with args "offset" (into dictionary) and "size" bytes.
99 // Encode a RUN opcode for "size" copies of the value "byte".
134 // Determines the best opcode to encode an instruction, and appends
135 // or substitutes that opcode and its size into the
165 // of the first and second instruction in the opcode.
197 // The instruction map facilitates finding an opcode quickly given an
204 // that contains the last single-instruction opcode generated by
209 // either no opcodes have been generated yet, or else the last opcode
210 // generated was a double-instruction opcode
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/perlasm/ |
| x86asm.pl | 16 # each opcode...
18 { my $opcode = $AUTOLOAD;
20 die "more than 4 arguments passed to $opcode" if ($#_>3);
22 $opcode =~ s/.*:://;
23 if ($opcode =~ /^push/) { $stack+=4; }
24 elsif ($opcode =~ /^pop/) { $stack-=4; }
26 &generic($opcode,@_) or die "undefined subroutine \&$AUTOLOAD";
30 { my $opcode=shift;
32 if ($#_==-1) { push(@out,"\t$opcode\n"); }
33 else { push(@out,"\t$opcode\t".join(',',@_)."\n");
[all...] |
| /external/grub/netboot/ |
| fsys_tftp.c | 104 if (tr->opcode == ntohs (TFTP_ERROR))
112 if (tr->opcode == ntohs (TFTP_OACK))
162 tp.opcode = htons (TFTP_ERROR);
167 + sizeof (tp.opcode) + sizeof (tp.u.err.errcode)
189 else if (tr->opcode == ntohs (TFTP_DATA))
216 tp.opcode = abort ? htons (TFTP_ERROR) : htons (TFTP_ACK);
338 grub_printf ("opcode = 0x%x, rrq = ", (unsigned long) tp.opcode);
429 tp.opcode = htons (TFTP_RRQ);
436 + sizeof (tp.ip) + sizeof (tp.udp) + sizeof (tp.opcode) + 1)
[all...] |
| /external/open-vcdiff/src/ |
| encodetable.h | 93 // Encode an ADD opcode with the "size" bytes starting at data
96 // Encode a COPY opcode with args "offset" (into dictionary) and "size" bytes.
99 // Encode a RUN opcode for "size" copies of the value "byte".
134 // Determines the best opcode to encode an instruction, and appends
135 // or substitutes that opcode and its size into the
165 // of the first and second instruction in the opcode.
197 // The instruction map facilitates finding an opcode quickly given an
204 // that contains the last single-instruction opcode generated by
209 // either no opcodes have been generated yet, or else the last opcode
210 // generated was a double-instruction opcode
[all...] |
| /external/openssl/crypto/perlasm/ |
| x86asm.pl | 16 # each opcode...
18 { my $opcode = $AUTOLOAD;
20 die "more than 4 arguments passed to $opcode" if ($#_>3);
22 $opcode =~ s/.*:://;
23 if ($opcode =~ /^push/) { $stack+=4; }
24 elsif ($opcode =~ /^pop/) { $stack-=4; }
26 &generic($opcode,@_) or die "undefined subroutine \&$AUTOLOAD";
30 { my $opcode=shift;
32 if ($#_==-1) { push(@out,"\t$opcode\n"); }
33 else { push(@out,"\t$opcode\t".join(',',@_)."\n");
[all...] |
| /dalvik/dx/src/com/android/dx/io/ |
| OpcodeInfo.java | 23 * Information about each Dalvik opcode.
35 * pseudo-opcode used for nonstandard formatted "instructions"
44 // TODO: These payload opcodes should be generated by opcode-gen.
61 // BEGIN(opcode-info-defs); GENERATED AUTOMATICALLY BY opcode-gen
1236 private final int opcode; field in class:OpcodeInfo.Info
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_program_alu.c | 44 rc_opcode Opcode, struct rc_sub_instruction * base,
53 fpi->U.I.Opcode = Opcode;
61 rc_opcode Opcode, struct rc_sub_instruction * base,
71 fpi->U.I.Opcode = Opcode;
80 rc_opcode Opcode, struct rc_sub_instruction * base,
91 fpi->U.I.Opcode = Opcode;
199 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode);
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/io/ |
| OpcodeInfo.java | 23 * Information about each Dalvik opcode.
35 * pseudo-opcode used for nonstandard formatted "instructions"
44 // TODO: These payload opcodes should be generated by opcode-gen.
61 // BEGIN(opcode-info-defs); GENERATED AUTOMATICALLY BY opcode-gen
1431 private final int opcode; field in class:OpcodeInfo.Info
[all...] |
