| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeFloatTypes.cpp | 616 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
[all...] |
| LegalizeVectorOps.cpp | 221 case ISD::SETCC:
296 else if (Node->getOpcode() == ISD::SETCC)
761 Ops[i] = DAG.getNode(ISD::SETCC, dl,
|
| LegalizeDAG.cpp | 46 /// 'setcc' instruction efficiently, but does support 'brcc' instruction, this
47 /// will attempt merge setcc and brc instructions into brcc's.
[all...] |
| SelectionDAG.cpp | 233 /// 'op' is a valid SetCC operation.
253 default: llvm_unreachable("Illegal integer setcc operation!");
274 // Cannot fold a signed integer setcc with an unsigned integer setcc.
284 // Canonicalize illegal integer setcc's.
298 // Cannot fold a signed setcc with an unsigned setcc.
304 // Canonicalize illegal integer setcc's.
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 598 /// associated with the SetCC condition, and whether or not the field is
719 // We can codegen setcc op, imm very efficiently compared to a brcond.
721 // setcc op, 0
751 } else if (Imm == ~0U) { // setcc op, -1
[all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| enc_prvt.h | 328 * Operation is conditional - MOVcc/SETcc/Jcc/ETC
|
| /external/chromium_org/v8/src/arm/ |
| regexp-macro-assembler-arm.cc | 253 __ sub(r1, r1, r0, SetCC); // Length of capture.
364 __ sub(r1, r1, r0, SetCC); // Length to check.
640 __ sub(r0, sp, r0, SetCC);
703 __ sub(r2, r2, Operand(1), SetCC);
[all...] |
| full-codegen-arm.cc | 178 __ sub(r2, r2, Operand(1), SetCC);
330 __ sub(r3, r3, Operand(Smi::FromInt(delta)), SetCC);
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm.cc | 972 __ mov(r1, Operand(r1, ASR, 1), SetCC);
977 __ mov(r2, Operand(r2, ASR, 1), SetCC);
984 __ mov(r3, Operand(r1, ASR, 1), SetCC); // Set the carry.
990 __ mov(r3, Operand(r2, ASR, 1), SetCC); // Unset the carry.
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 604 /// getSetCC - Helper function to make it easier to build SetCC's if you just
614 "Cannot create a setCC of an invalid node.");
615 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| select.ll | 22 ; A SetCC whose result is used should produce instructions to
|
| /external/llvm/test/CodeGen/X86/ |
| cmov.ll | 118 ; Should compile to setcc | -2.
|
| /external/v8/src/arm/ |
| regexp-macro-assembler-arm.cc | 295 __ sub(r1, r1, r0, SetCC); // Length of capture.
401 __ sub(r1, r1, r0, SetCC); // Length to check.
645 __ sub(r0, sp, r0, SetCC);
698 __ sub(r2, r2, Operand(1), SetCC);
[all...] |
| lithium-codegen-arm.cc | 168 __ sub(r0, r0, Operand(1), SetCC);
914 __ and_(result, result, Operand(divisor - 1), SetCC);
[all...] |
| builtins-arm.cc | 351 __ and_(r3, r2, Operand(kIntptrSignBit | kSmiTagMask), SetCC);
759 __ sub(r4, r4, Operand(1), SetCC);
841 __ sub(r3, r3, Operand(r6), SetCC);
[all...] |
| full-codegen-arm.cc | 326 __ sub(r3, r3, Operand(Smi::FromInt(delta)), SetCC);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 48 setOperationAction(ISD::SETCC, MVT::i32, Custom);
252 case ISD::SETCC: return LowerSETCC(Op, DAG);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 48 setOperationAction(ISD::SETCC, MVT::i32, Custom);
252 case ISD::SETCC: return LowerSETCC(Op, DAG);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | [all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 53 setOperationAction(ISD::SETCC, MVT::v4i32, Expand);
54 setOperationAction(ISD::SETCC, MVT::v2i32, Expand);
68 setOperationAction(ISD::SETCC, MVT::i32, Expand);
69 setOperationAction(ISD::SETCC, MVT::f32, Expand);
771 ISD::SETCC,
[all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
| gen_x86_insn.py | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 226 // X86 is weird, it always uses i8 for shift amounts and setcc results.
517 setOperationAction(ISD::SETCC , MVT::i8 , Custom);
518 setOperationAction(ISD::SETCC , MVT::i16 , Custom);
519 setOperationAction(ISD::SETCC , MVT::i32 , Custom);
520 setOperationAction(ISD::SETCC , MVT::f32 , Custom);
521 setOperationAction(ISD::SETCC , MVT::f64 , Custom);
522 setOperationAction(ISD::SETCC , MVT::f80 , Custom);
525 setOperationAction(ISD::SETCC , MVT::i64 , Custom);
[all...] |
| /external/chromium_org/v8/src/x64/ |
| disasm-x64.cc | 436 int SetCC(byte* data);
834 int DisassemblerX64::SetCC(byte* data) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/v8/src/x64/ |
| disasm-x64.cc | 431 int SetCC(byte* data);
825 int DisassemblerX64::SetCC(byte* data) {
[all...] |
