| /external/llvm/lib/CodeGen/ |
| PHIEliminationUtils.h | 17 /// SrcReg when following the CFG edge to SuccMBB. This needs to be after
18 /// any def of SrcReg, but before any subsequent point where control flow
22 unsigned SrcReg);
|
| RegisterCoalescer.h | 35 /// SrcReg - the virtual register that will be coalesced into dstReg.
36 unsigned SrcReg;
42 /// SrcIdx - The sub-register index of the old SrcReg in the new coalesced
52 /// Flipped - True when DstReg and SrcReg are reversed from the original
58 /// SrcReg and DstReg.
63 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
70 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
77 /// flip - Swap SrcReg and DstReg. Return false if swapping is impossible
105 unsigned getSrcReg() const { return SrcReg; }
111 /// getSrcIdx - Return the subregister index that SrcReg will be coalesce
[all...] |
| PHIEliminationUtils.cpp | 17 // findCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg
19 // SrcReg, but before any subsequent point where control flow might jump out of
23 unsigned SrcReg) {
37 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(SrcReg),
|
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| prog_execute.c | 398 inst->SrcReg[0].File == PROGRAM_INPUT &&
399 inst->SrcReg[0].Index == FRAG_ATTRIB_TEX0 + inst->TexSrcUnit) {
401 GLuint attr = inst->SrcReg[0].Index;
669 fetch_vector4(&inst->SrcReg[0], machine, a);
680 fetch_vector4(&inst->SrcReg[0], machine, a);
681 fetch_vector4(&inst->SrcReg[1], machine, b);
697 fetch_vector4ui(&inst->SrcReg[0], machine, a);
698 fetch_vector4ui(&inst->SrcReg[1], machine, b);
709 fetch_vector4(&inst->SrcReg[0], machine, t);
770 fetch_vector4(&inst->SrcReg[0], machine, a)
[all...] |
| nvfragparse.c | 962 struct prog_src_register *srcReg)
978 srcReg->Abs = GL_TRUE;
989 srcReg->Abs = GL_FALSE;
994 srcReg->Negate = srcReg->Abs ? negateAbs : negateBase;
1004 srcReg->File = PROGRAM_TEMPORARY;
1007 srcReg->Index = idx;
1011 srcReg->File = PROGRAM_INPUT;
1014 srcReg->Index = idx;
1018 srcReg->File = PROGRAM_LOCAL_PARAM
[all...] |
| prog_optimize.c | 117 const GLuint coord = GET_SWZ(inst->SrcReg[arg].Swizzle, comp);
144 src_comp = GET_SWZ(mov->SrcReg[0].Swizzle, comp);
228 if (inst->SrcReg[j].File == file) {
229 GLuint index = inst->SrcReg[j].Index;
231 inst->SrcReg[j].Index = map[index];
274 if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) {
275 const GLuint index = inst->SrcReg[j].Index;
280 if (inst->SrcReg[j].RelAddr) {
287 const GLuint swz = GET_SWZ(inst->SrcReg[j].Swizzle, comp);
412 if (inst->SrcReg[j].RelAddr |
[all...] |
| /external/mesa3d/src/mesa/program/ |
| prog_execute.c | 398 inst->SrcReg[0].File == PROGRAM_INPUT &&
399 inst->SrcReg[0].Index == FRAG_ATTRIB_TEX0 + inst->TexSrcUnit) {
401 GLuint attr = inst->SrcReg[0].Index;
669 fetch_vector4(&inst->SrcReg[0], machine, a);
680 fetch_vector4(&inst->SrcReg[0], machine, a);
681 fetch_vector4(&inst->SrcReg[1], machine, b);
697 fetch_vector4ui(&inst->SrcReg[0], machine, a);
698 fetch_vector4ui(&inst->SrcReg[1], machine, b);
709 fetch_vector4(&inst->SrcReg[0], machine, t);
770 fetch_vector4(&inst->SrcReg[0], machine, a)
[all...] |
| nvfragparse.c | 962 struct prog_src_register *srcReg)
978 srcReg->Abs = GL_TRUE;
989 srcReg->Abs = GL_FALSE;
994 srcReg->Negate = srcReg->Abs ? negateAbs : negateBase;
1004 srcReg->File = PROGRAM_TEMPORARY;
1007 srcReg->Index = idx;
1011 srcReg->File = PROGRAM_INPUT;
1014 srcReg->Index = idx;
1018 srcReg->File = PROGRAM_LOCAL_PARAM
[all...] |
| prog_optimize.c | 117 const GLuint coord = GET_SWZ(inst->SrcReg[arg].Swizzle, comp);
144 src_comp = GET_SWZ(mov->SrcReg[0].Swizzle, comp);
228 if (inst->SrcReg[j].File == file) {
229 GLuint index = inst->SrcReg[j].Index;
231 inst->SrcReg[j].Index = map[index];
274 if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) {
275 const GLuint index = inst->SrcReg[j].Index;
280 if (inst->SrcReg[j].RelAddr) {
287 const GLuint swz = GET_SWZ(inst->SrcReg[j].Swizzle, comp);
412 if (inst->SrcReg[j].RelAddr |
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_emulate_branches.c | 79 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
81 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index;
83 inst->U.I.SrcReg[0].Swizzle = 0;
84 inst->U.I.SrcReg[0].Abs = 0;
85 inst->U.I.SrcReg[0].Negate = 0;
169 inst_mov->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
170 inst_mov->U.I.SrcReg[0].Index = index;
188 inst_cmp->U.I.SrcReg[0] = inst_if->U.I.SrcReg[0]
[all...] |
| radeon_emulate_loops.c | 99 if(!rc_src_reg_is_immediate(value->C, inst->U.I.SrcReg[0].File,
100 inst->U.I.SrcReg[0].Index)){
106 inst->U.I.SrcReg[0].Index,
107 inst->U.I.SrcReg[0].Swizzle,
108 inst->U.I.SrcReg[0].Negate, 0);
140 if(inst->U.I.SrcReg[0].File == RC_FILE_TEMPORARY &&
141 inst->U.I.SrcReg[0].Index == count_inst->Index &&
142 inst->U.I.SrcReg[0].Swizzle == count_inst->Swz){
144 } else if( inst->U.I.SrcReg[1].File == RC_FILE_TEMPORARY &&
145 inst->U.I.SrcReg[1].Index == count_inst->Index &
[all...] |
| radeon_program_print.c | 204 rc_print_register(f, inst.SrcReg[0].File,
205 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr);
208 rc_print_register(f, inst.SrcReg[1].File,
209 inst.SrcReg[1].Index,inst.SrcReg[1].RelAddr);
211 rc_print_register(f, inst.SrcReg[0].File,
212 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr);
215 rc_print_register(f, inst.SrcReg[1].File
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_emulate_branches.c | 79 inst_mov->U.I.SrcReg[0] = inst->U.I.SrcReg[0];
81 inst->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
82 inst->U.I.SrcReg[0].Index = inst_mov->U.I.DstReg.Index;
83 inst->U.I.SrcReg[0].Swizzle = 0;
84 inst->U.I.SrcReg[0].Abs = 0;
85 inst->U.I.SrcReg[0].Negate = 0;
169 inst_mov->U.I.SrcReg[0].File = RC_FILE_TEMPORARY;
170 inst_mov->U.I.SrcReg[0].Index = index;
188 inst_cmp->U.I.SrcReg[0] = inst_if->U.I.SrcReg[0]
[all...] |
| radeon_emulate_loops.c | 99 if(!rc_src_reg_is_immediate(value->C, inst->U.I.SrcReg[0].File,
100 inst->U.I.SrcReg[0].Index)){
106 inst->U.I.SrcReg[0].Index,
107 inst->U.I.SrcReg[0].Swizzle,
108 inst->U.I.SrcReg[0].Negate, 0);
140 if(inst->U.I.SrcReg[0].File == RC_FILE_TEMPORARY &&
141 inst->U.I.SrcReg[0].Index == count_inst->Index &&
142 inst->U.I.SrcReg[0].Swizzle == count_inst->Swz){
144 } else if( inst->U.I.SrcReg[1].File == RC_FILE_TEMPORARY &&
145 inst->U.I.SrcReg[1].Index == count_inst->Index &
[all...] |
| radeon_program_print.c | 204 rc_print_register(f, inst.SrcReg[0].File,
205 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr);
208 rc_print_register(f, inst.SrcReg[1].File,
209 inst.SrcReg[1].Index,inst.SrcReg[1].RelAddr);
211 rc_print_register(f, inst.SrcReg[0].File,
212 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr);
215 rc_print_register(f, inst.SrcReg[1].File
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1InstrInfo.cpp | 43 unsigned DestReg, unsigned SrcReg,
46 .addReg(SrcReg, getKillRegState(KillSrc)));
47 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
53 unsigned SrcReg, bool isKill, int FI,
57 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
58 isARMLowRegister(SrcReg))) && "Unknown regclass!");
61 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
62 isARMLowRegister(SrcReg))) {
74 .addReg(SrcReg, getKillRegState(isKill))
|
| /external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
| st_atom_pixeltransfer.c | 165 inst[ic].SrcReg[0].File = PROGRAM_INPUT;
166 inst[ic].SrcReg[0].Index = FRAG_ATTRIB_TEX0;
189 inst[ic].SrcReg[0].File = PROGRAM_TEMPORARY;
190 inst[ic].SrcReg[0].Index = colorTemp;
191 inst[ic].SrcReg[1].File = PROGRAM_STATE_VAR;
192 inst[ic].SrcReg[1].Index = scale_p;
193 inst[ic].SrcReg[2].File = PROGRAM_STATE_VAR;
194 inst[ic].SrcReg[2].Index = bias_p;
219 inst[ic].SrcReg[0].File = PROGRAM_TEMPORARY;
220 inst[ic].SrcReg[0].Index = colorTemp
[all...] |
| st_mesa_to_tgsi.c | 340 const struct prog_src_register *SrcReg )
342 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
344 if (t->procType == TGSI_PROCESSOR_GEOMETRY && SrcReg->HasIndex2) {
345 src = src_register( t, SrcReg->File, SrcReg->Index2 );
346 if (SrcReg->RelAddr2)
348 SrcReg->Index);
350 src = ureg_src_dimension( src, SrcReg->Index);
354 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3
[all...] |
| /external/mesa3d/src/mesa/state_tracker/ |
| st_atom_pixeltransfer.c | 165 inst[ic].SrcReg[0].File = PROGRAM_INPUT;
166 inst[ic].SrcReg[0].Index = FRAG_ATTRIB_TEX0;
189 inst[ic].SrcReg[0].File = PROGRAM_TEMPORARY;
190 inst[ic].SrcReg[0].Index = colorTemp;
191 inst[ic].SrcReg[1].File = PROGRAM_STATE_VAR;
192 inst[ic].SrcReg[1].Index = scale_p;
193 inst[ic].SrcReg[2].File = PROGRAM_STATE_VAR;
194 inst[ic].SrcReg[2].Index = bias_p;
219 inst[ic].SrcReg[0].File = PROGRAM_TEMPORARY;
220 inst[ic].SrcReg[0].Index = colorTemp
[all...] |
| st_mesa_to_tgsi.c | 340 const struct prog_src_register *SrcReg )
342 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
344 if (t->procType == TGSI_PROCESSOR_GEOMETRY && SrcReg->HasIndex2) {
345 src = src_register( t, SrcReg->File, SrcReg->Index2 );
346 if (SrcReg->RelAddr2)
348 SrcReg->Index);
350 src = ureg_src_dimension( src, SrcReg->Index);
354 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 93 unsigned DestReg, unsigned SrcReg,
98 if (Mips::GPR32RegClass.contains(SrcReg))
100 else if (Mips::CCRRegClass.contains(SrcReg))
102 else if (Mips::FGR32RegClass.contains(SrcReg))
104 else if (Mips::HIRegsRegClass.contains(SrcReg))
105 Opc = Mips::MFHI, SrcReg = 0;
106 else if (Mips::LORegsRegClass.contains(SrcReg))
107 Opc = Mips::MFLO, SrcReg = 0;
108 else if (Mips::HIRegsDSPRegClass.contains(SrcReg))
110 else if (Mips::LORegsDSPRegClass.contains(SrcReg))
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonPeephole.cpp | 142 unsigned SrcReg = Src.getReg();
145 TargetRegisterInfo::isVirtualRegister(SrcReg)) {
149 PeepholeMap[DstReg] = SrcReg;
164 unsigned SrcReg = Src2.getReg();
165 PeepholeMap[DstReg] = SrcReg;
181 unsigned SrcReg = Src1.getReg();
183 std::make_pair(*&SrcReg, 1/*Hexagon::subreg_hireg*/);
193 unsigned SrcReg = Src.getReg();
196 TargetRegisterInfo::isVirtualRegister(SrcReg)) {
200 PeepholeMap[DstReg] = SrcReg;
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/svga/svgadump/ |
| svga_shader_dump.c | 414 static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, const struct dump_info *di )
416 switch (srcreg.modifier) {
430 dump_reg( *(struct sh_reg *) &srcreg, indreg, di );
431 switch (srcreg.modifier) {
462 if (srcreg.swizzle_x != 0 || srcreg.swizzle_y != 1 || srcreg.swizzle_z != 2 || srcreg.swizzle_w != 3) {
464 if (srcreg.swizzle_x == srcreg.swizzle_y && srcreg.swizzle_y == srcreg.swizzle_z && srcreg.swizzle_z == srcreg.swizzle_w)
[all...] |
| /external/mesa3d/src/gallium/drivers/svga/svgadump/ |
| svga_shader_dump.c | 414 static void dump_srcreg( struct sh_srcreg srcreg, struct sh_srcreg *indreg, const struct dump_info *di )
416 switch (srcreg.modifier) {
430 dump_reg( *(struct sh_reg *) &srcreg, indreg, di );
431 switch (srcreg.modifier) {
462 if (srcreg.swizzle_x != 0 || srcreg.swizzle_y != 1 || srcreg.swizzle_z != 2 || srcreg.swizzle_w != 3) {
464 if (srcreg.swizzle_x == srcreg.swizzle_y && srcreg.swizzle_y == srcreg.swizzle_z && srcreg.swizzle_z == srcreg.swizzle_w)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
| i915_fragprog.c | 275 GLuint coord = src_vector( p, &inst->SrcReg[0], program); \
292 (N<1)?0:src_vector( p, &inst->SrcReg[0], program), \
293 (N<2)?0:src_vector( p, &inst->SrcReg[1], program), \
294 (N<3)?0:src_vector( p, &inst->SrcReg[2], program)); \
328 if (inst->SrcReg[a].File == PROGRAM_TEMPORARY) {
331 if (inst->SrcReg[a].Index >= I915_MAX_TEMPORARY)
334 regsUsed |= 1 << inst->SrcReg[a].Index;
337 const unsigned field = GET_SWZ(inst->SrcReg[a].Swizzle, c);
340 live_components[inst->SrcReg[a].Index] |= (1U << field);
414 src0 = src_vector(p, &inst->SrcReg[0], program)
[all...] |
