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  /external/llvm/test/CodeGen/ARM/
coalesce-subregs.ll 121 ; The destination lane isn't read, so the subregs can coalesce.
  /prebuilts/gcc/darwin-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/
cfgloop.h 313 due to need to handle subregs and extends. The value of the object described
rtl.h     [all...]
  /prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/
cfgloop.h 313 due to need to handle subregs and extends. The value of the object described
rtl.h     [all...]
  /prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/
cfgloop.h 313 due to need to handle subregs and extends. The value of the object described
rtl.h     [all...]
  /prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/
cfgloop.h 313 due to need to handle subregs and extends. The value of the object described
rtl.h     [all...]
  /external/llvm/lib/CodeGen/
RegAllocFast.cpp 661 // subregs. This may invalidate any operand pointers.
    [all...]
InlineSpiller.cpp     [all...]
RegisterCoalescer.cpp 323 // FIXME: Coalescer should support subregs symmetrically.
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  /external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp 334 assert(!MO.getSubReg() && "Subregs should be eliminated!");
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ARMISelLowering.cpp 470 // v2f64 is legal so that QR subregs can be extracted as f64 elements, but
    [all...]
ARMInstrNEON.td     [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 165 // Give LowerOperation the chance to replace 64-bit ORs with subregs.
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SystemZInstrInfo.td     [all...]
  /external/llvm/lib/Target/X86/
X86InstrCompiler.td     [all...]

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