| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 569 MachineBasicBlock::iterator Ins = MBB->begin();
571 if (Ins != MBB->end())
572 DL = Ins->getDebugLoc();
580 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 117 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG,
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.h | 47 const SmallVectorImpl<ISD::InputArg> &Ins) const;
|
| SIISelLowering.cpp | 130 const SmallVectorImpl<ISD::InputArg> &Ins,
145 for (unsigned i = 0, e = Ins.size(), PSInputNum = 0; i != e; ++i) {
146 const ISD::InputArg &Arg = Ins[i];
205 for (unsigned i = 0, e = Ins.size(), ArgIdx = 0; i != e; ++i) {
207 const ISD::InputArg &Arg = Ins[i];
[all...] |
| AMDGPUISelLowering.cpp | 152 const SmallVectorImpl<ISD::InputArg> &Ins) const {
154 State.AnalyzeFormalArguments(Ins, CC_AMDGPU);
|
| R600ISelLowering.cpp | [all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.h | 46 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| AMDGPUISelLowering.cpp | 52 const SmallVectorImpl<ISD::InputArg> &Ins,
58 for (unsigned i = 0, e = Ins.size(); i < e; ++i) {
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 316 const SmallVectorImpl<ISD::InputArg> &Ins,
321 return LowerFormalArguments_64(Chain, CallConv, IsVarArg, Ins,
323 return LowerFormalArguments_32(Chain, CallConv, IsVarArg, Ins,
334 const SmallVectorImpl<ISD::InputArg> &Ins,
346 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc32);
353 if (i == 0 && Ins[i].Flags.isSRet()) {
534 const SmallVectorImpl<ISD::InputArg> &Ins,
544 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc64);
659 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 793 const SmallVectorImpl<ISD::InputArg> &Ins,
820 const SmallVectorImpl<ISD::InputArg> &Ins,
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 52 const SmallVectorImpl<ISD::InputArg> &Ins,
58 for (unsigned i = 0, e = Ins.size(); i < e; ++i) {
|
| /external/llvm/include/llvm/Transforms/Utils/ |
| SSAUpdaterImpl.h | 71 SmallVectorImpl<PhiT*> *Ins) :
72 Updater(U), AvailableVals(A), InsertedPHIs(Ins) { }
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| PPCRegisterInfo.cpp | 806 MachineBasicBlock::iterator Ins = MBB->begin();
808 if (Ins != MBB->end())
809 DL = Ins->getDebugLoc();
817 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 160 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| SystemZISelLowering.cpp | 576 const SmallVectorImpl<ISD::InputArg> &Ins,
590 CCInfo.AnalyzeFormalArguments(Ins, CC_SystemZ);
699 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
818 RetCCInfo.AnalyzeCallResult(Ins, RetCC_SystemZ);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 353 SmallVectorImpl<ISD::InputArg> &Ins,
365 CCInfo.AnalyzeCallResult(Ins, RetCC_Hexagon);
388 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins;
432 Outs, OutVals, Ins, DAG);
597 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, DAG,
815 SmallVectorImpl<ISD::InputArg> &Ins,
832 CCInfo.AnalyzeFormalArguments(Ins, CC_Hexagon);
845 ISD::ArgFlagsTy Flags = Ins[i].Flags;
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 182 case MipsISD::Ins: return "MipsISD::Ins";
606 // Pattern match INS.
609 // => ins $dst, $src, size, pos, $src1
652 return DAG.getNode(MipsISD::Ins, SDLoc(N), ValTy, Shl.getOperand(0),
[all...] |
| /external/llvm/include/llvm/TableGen/ |
| Record.h | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | 327 DenseMap<const CodeGenRegister*, CodeGenSubRegIndex*>::iterator Ins =
329 if (Ins->second == SI->first)
337 SI->first->getName() + " and " + Ins->second->getName());
[all...] |
