/external/llvm/lib/Target/Hexagon/ |
HexagonInstrInfo.h | 61 SmallVectorImpl<MachineOperand> &Cond, 68 const SmallVectorImpl<MachineOperand> &Cond, 87 SmallVectorImpl<MachineOperand> &Addr, 89 SmallVectorImpl<MachineInstr*> &NewMIs) const; 98 SmallVectorImpl<MachineOperand> &Addr, 100 SmallVectorImpl<MachineInstr*> &NewMIs) const; 104 const SmallVectorImpl<unsigned> &Ops, 109 const SmallVectorImpl<unsigned> &Ops, 120 const SmallVectorImpl<MachineOperand> &Cond) const; 141 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1 [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430InstrInfo.h | 74 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 78 SmallVectorImpl<MachineOperand> &Cond, 84 const SmallVectorImpl<MachineOperand> &Cond,
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/external/llvm/lib/Target/X86/Utils/ |
X86ShuffleDecode.cpp | 23 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { 47 void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) { 56 void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask) { 65 SmallVectorImpl<int> &ShuffleMask) { 85 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { 102 SmallVectorImpl<int> &ShuffleMask) { 118 SmallVectorImpl<int> &ShuffleMask) { 136 void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { 158 void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { 178 void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.h | 54 SmallVectorImpl<MachineOperand> &Cond, 59 const SmallVectorImpl<MachineOperand> &Cond, 82 SmallVectorImpl<MachineOperand> &Cond) const;
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
SIMCCodeEmitter.cpp | 75 SmallVectorImpl<MCFixup> &Fixups) const; 79 SmallVectorImpl<MCFixup> &Fixups) const; 88 SmallVectorImpl<MCFixup> &Fixup) const; 92 SmallVectorImpl<MCFixup> &Fixup) const; 97 SmallVectorImpl<MCFixup> &Fixup) const; 101 SmallVectorImpl<MCFixup> &Fixup) const; 132 SmallVectorImpl<MCFixup> &Fixups) const { 142 SmallVectorImpl<MCFixup> &Fixups) const { 169 SmallVectorImpl<MCFixup> &Fixup) const { 175 SmallVectorImpl<MCFixup> &Fixup) const [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 231 SmallVectorImpl<MachineOperand> &Cond, 236 const SmallVectorImpl<MachineOperand> &Cond, 239 const SmallVectorImpl<MachineOperand> &Cond, 244 const SmallVectorImpl<MachineOperand> &Cond, 257 SmallVectorImpl<MachineOperand> &Addr, 261 SmallVectorImpl<MachineInstr*> &NewMIs) const; 270 SmallVectorImpl<MachineOperand> &Addr, 274 SmallVectorImpl<MachineInstr*> &NewMIs) const; 286 const SmallVectorImpl<unsigned> &Ops, 294 const SmallVectorImpl<unsigned> &Ops [all...] |
/external/llvm/include/llvm/CodeGen/ |
LiveRangeEdit.h | 61 SmallVectorImpl<LiveInterval*> &NewRegs; 92 bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead); 111 SmallVectorImpl<LiveInterval*> &newRegs, 130 typedef SmallVectorImpl<LiveInterval*>::const_iterator iterator; 206 void eliminateDeadDefs(SmallVectorImpl<MachineInstr*> &Dead,
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CallingConvLower.h | 161 SmallVectorImpl<CCValAssign> &Locs; 222 const TargetMachine &TM, SmallVectorImpl<CCValAssign> &locs, 245 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, 250 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, 256 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags, 261 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, 266 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, 267 SmallVectorImpl<ISD::ArgFlagsTy> &Flags, 272 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.h | 117 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, 118 SmallVectorImpl<SDValue> &InVals) const; 121 LowerCall(CallLoweringInfo &CLI, SmallVectorImpl<SDValue> &InVals) const; 124 const SmallVectorImpl<ISD::OutputArg> &, 130 const SmallVectorImpl<ISD::OutputArg> &Outs, 131 const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, 162 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
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/external/llvm/lib/Target/Mips/ |
MipsISelLowering.h | 181 SmallVectorImpl<SDValue> &Results, 190 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results, 225 getOpndList(SmallVectorImpl<SDValue> &Ops, 252 void analyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, 256 void analyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, 260 void analyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, 264 void analyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, 285 typedef SmallVectorImpl<ByValArgInfo>::const_iterator byval_iterator; 317 void analyzeReturn(const SmallVectorImpl<Ty> &RetVals, bool IsSoftFloat, 338 const SmallVectorImpl<ISD::InputArg> &Ins [all...] |
MipsSEISelLowering.h | 34 virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, 54 getOpndList(SmallVectorImpl<SDValue> &Ops,
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/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.h | 153 const SmallVectorImpl<ISD::InputArg> &Ins, 155 SmallVectorImpl<SDValue> &InVals) const; 159 const SmallVectorImpl<ISD::OutputArg> &Outs, 160 const SmallVectorImpl<SDValue> &OutVals, 164 SmallVectorImpl<SDValue> &InVals) const; 168 const SmallVectorImpl<ISD::InputArg> &Ins, 170 SmallVectorImpl<SDValue> &InVals) const; 186 const SmallVectorImpl<ISD::OutputArg> &Outs, 187 const SmallVectorImpl<SDValue> &OutVals, 188 const SmallVectorImpl<ISD::InputArg> &Ins [all...] |
AArch64InstrInfo.h | 59 SmallVectorImpl<MachineOperand> &Cond, 63 const SmallVectorImpl<MachineOperand> &Cond, 66 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
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/external/clang/lib/Sema/ |
MultiplexExternalSemaSource.cpp | 100 SmallVectorImpl<Decl*> &Result) { 111 SmallVectorImpl<Decl *> &Decls){ 192 SmallVectorImpl<NamespaceDecl*> &Namespaces){ 211 SmallVectorImpl<VarDecl*> &TentativeDefs) { 217 SmallVectorImpl<const DeclaratorDecl*> &Decls) { 223 SmallVectorImpl<CXXConstructorDecl*> &Decls) { 229 SmallVectorImpl<TypedefNameDecl*> &Decls) { 235 SmallVectorImpl<CXXRecordDecl*> &Decls) { 241 SmallVectorImpl<NamedDecl*> &Decls) { 247 SmallVectorImpl<std::pair<Selector, SourceLocation> > &Sels) [all...] |
/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.cpp | 63 SmallVectorImpl<MCFixup> &Fixups) const; 68 SmallVectorImpl<MCFixup> &Fixups) const; 74 SmallVectorImpl<MCFixup> &Fixups) const; 80 SmallVectorImpl<MCFixup> &Fixups) const; 85 SmallVectorImpl<MCFixup> &Fixups) const; 88 SmallVectorImpl<MCFixup> &Fixups) const; 90 SmallVectorImpl<MCFixup> &Fixups) const; 92 SmallVectorImpl<MCFixup> &Fixups) const; 95 getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups) const; 183 SmallVectorImpl<MCFixup> &Fixups) cons [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZInstrInfo.h | 125 SmallVectorImpl<MachineOperand> &Cond, 130 const SmallVectorImpl<MachineOperand> &Cond, 147 const SmallVectorImpl<MachineOperand> &Pred) const 171 const SmallVectorImpl<unsigned> &Ops, 175 const SmallVectorImpl<unsigned> &Ops, 180 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
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/external/llvm/lib/Target/R600/ |
R600ISelLowering.h | 32 SmallVectorImpl<SDValue> &Results, 38 const SmallVectorImpl<ISD::InputArg> &Ins, 40 SmallVectorImpl<SDValue> &InVals) const;
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/external/clang/lib/AST/ |
ExternalASTSource.cpp | 58 SmallVectorImpl<Decl*> &Result) {
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/external/llvm/lib/CodeGen/ |
PrologEpilogInserter.h | 115 SmallVectorImpl<MachineBasicBlock *> &blks); 116 bool addUsesForTopLevelLoops(SmallVectorImpl<MachineBasicBlock *> &blks); 118 SmallVectorImpl<MachineBasicBlock *> &blks, 121 SmallVectorImpl<MachineBasicBlock *> &blks,
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CallingConvLower.cpp | 27 const TargetMachine &tm, SmallVectorImpl<CCValAssign> &locs, 67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, 86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, 100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, 118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, 136 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, 137 SmallVectorImpl<ISD::ArgFlagsTy> &Flags, 155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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/external/llvm/include/llvm/ADT/ |
SmallVector.h | 367 /// SmallVectorImpl - This class consists of common code factored out of the 371 class SmallVectorImpl : public SmallVectorTemplateBase<T, isPodLike<T>::value> { 374 SmallVectorImpl(const SmallVectorImpl&) LLVM_DELETED_FUNCTION; 381 explicit SmallVectorImpl(unsigned N) 386 ~SmallVectorImpl() { 440 void swap(SmallVectorImpl &RHS); 674 SmallVectorImpl &operator=(const SmallVectorImpl &RHS); 677 SmallVectorImpl &operator=(SmallVectorImpl &&RHS) [all...] |
/external/llvm/include/llvm/Analysis/ |
PHITransAddr.h | 88 SmallVectorImpl<Instruction*> &NewInsts); 107 SmallVectorImpl<Instruction*> &NewInsts);
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/external/llvm/include/llvm/IR/ |
LLVMContext.h | 30 template <typename T> class SmallVectorImpl; 61 void getMDKindNames(SmallVectorImpl<StringRef> &Result) const;
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/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.h | 67 SmallVectorImpl<MachineOperand> &Cond, 74 const SmallVectorImpl<MachineOperand> &Cond,
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/external/llvm/tools/lli/ |
RecordingMemoryManager.h | 44 typedef SmallVectorImpl<Allocation>::const_iterator const_data_iterator; 45 typedef SmallVectorImpl<Allocation>::const_iterator const_code_iterator;
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