/external/llvm/lib/CodeGen/ |
PeepholeOptimizer.cpp | 70 #include "llvm/Target/TargetInstrInfo.h" 93 const TargetInstrInfo *TII;
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StackSlotColoring.cpp | 31 #include "llvm/Target/TargetInstrInfo.h" 50 const TargetInstrInfo *TII;
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TwoAddressInstructionPass.cpp | 49 #include "llvm/Target/TargetInstrInfo.h" 71 const TargetInstrInfo *TII; 339 static bool isCopyToReg(MachineInstr &MI, const TargetInstrInfo *TII, 404 const TargetInstrInfo *TII, 454 const TargetInstrInfo *TII, 588 "TargetInstrInfo::commuteInstruction() should not return a new " [all...] |
BranchFolding.cpp | 35 #include "llvm/Target/TargetInstrInfo.h" 175 const TargetInstrInfo *tii, 459 const TargetInstrInfo *TII) { [all...] |
IfConversion.cpp | 30 #include "llvm/Target/TargetInstrInfo.h" 83 /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its 155 const TargetInstrInfo *TII; [all...] |
ExecutionDepsFix.cpp | 31 #include "llvm/Target/TargetInstrInfo.h" 131 const TargetInstrInfo *TII;
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MachineCSE.cpp | 28 #include "llvm/Target/TargetInstrInfo.h" 41 const TargetInstrInfo *TII;
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PHIElimination.cpp | 33 #include "llvm/Target/TargetInstrInfo.h" 243 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
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PostRASchedulerList.cpp | 44 #include "llvm/Target/TargetInstrInfo.h" 82 const TargetInstrInfo *TII;
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RegAllocPBQP.cpp | 56 #include "llvm/Target/TargetInstrInfo.h" 132 const TargetInstrInfo *tii;
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MachineTraceMetrics.cpp | 23 #include "llvm/Target/TargetInstrInfo.h" [all...] |
MachineInstr.cpp | 40 #include "llvm/Target/TargetInstrInfo.h" [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFrameLowering.cpp | 587 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 655 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 738 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); [all...] |
ARMLoadStoreOptimizer.cpp | 40 #include "llvm/Target/TargetInstrInfo.h" 65 const TargetInstrInfo *TII; 124 const TargetInstrInfo *TII, 847 const TargetInstrInfo *TII, [all...] |
ARMBaseInstrInfo.cpp | 10 // This file contains the Base ARM implementation of the TargetInstrInfo class. 109 return TargetInstrInfo::CreateTargetHazardRecognizer(TM, DAG); 117 return TargetInstrInfo::CreateTargetPostRAHazardRecognizer(II, DAG); [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILCFGStructurizer.cpp | 31 #include "llvm/Target/TargetInstrInfo.h" [all...] |
SIISelLowering.cpp | 68 const TargetInstrInfo * TII = getTargetMachine().getInstrInfo();
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/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.cpp | 10 // This file contains the AArch64 implementation of the TargetInstrInfo class. 605 DebugLoc dl, const TargetInstrInfo &TII, 689 DebugLoc dl, const TargetInstrInfo &TII,
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/external/llvm/lib/Target/X86/ |
X86FrameLowering.cpp | 149 const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) { [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
SIISelLowering.cpp | 68 const TargetInstrInfo * TII = getTargetMachine().getInstrInfo();
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/external/llvm/lib/CodeGen/SelectionDAG/ |
FunctionLoweringInfo.cpp | 35 #include "llvm/Target/TargetInstrInfo.h" 175 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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SelectionDAGDumper.cpp | 27 #include "llvm/Target/TargetInstrInfo.h" 40 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
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/external/llvm/lib/Target/Mips/ |
MipsSEISelDAGToDAG.cpp | 116 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
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/external/llvm/lib/Target/R600/ |
SILowerControlFlow.cpp | 70 const TargetInstrInfo *TII;
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/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | [all...] |