| /external/llvm/lib/Target/R600/ |
| R600Packetizer.cpp | 63 return TRI.getHWRegChan(MI->getOperand(0).getReg());
87 unsigned Dst = BI->getOperand(DstIdx).getReg();
133 unsigned Src = MI->getOperand(OperandIdx).getReg();
180 unsigned PredI = (OpI > -1)?MII->getOperand(OpI).getReg():0,
181 PredJ = (OpJ > -1)?MIJ->getOperand(OpJ).getReg():0;
192 if (MII->getOperand(0).getReg() != MIJ->getOperand(0).getReg())
|
| AMDGPUInstrInfo.cpp | 236 if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
237 const TargetRegisterClass * oldRegClass = MRI.getRegClass(MO.getReg());
242 MRI.setRegClass(MO.getReg(), newRegClass);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.cpp | 524 BuildMI(BB, DL, TII->get(Opc)).addReg(MI->getOperand(3).getReg())
541 TII->get(Mips::PHI), MI->getOperand(0).getReg())
542 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB)
543 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB);
587 BuildMI(BB, DL, TII->get(Opc2)).addReg(MI->getOperand(3).getReg())
588 .addReg(MI->getOperand(4).getReg());
605 TII->get(Mips::PHI), MI->getOperand(0).getReg())
606 .addReg(MI->getOperand(1).getReg()).addMBB(thisMBB)
607 .addReg(MI->getOperand(2).getReg()).addMBB(copy0MBB);
652 BuildMI(BB, DL, TII->get(Opc2)).addReg(MI->getOperand(3).getReg())
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineLICM.cpp | 433 unsigned Reg = MO.getReg();
540 unsigned Reg = MO.getReg();
567 if (!MO.isReg() || MO.isDef() || !MO.getReg())
569 unsigned Reg = MO.getReg();
597 if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;
598 if (MO.getReg() == Reg || TRI->isSuperRegister(Reg, MO.getReg()))
773 return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
817 unsigned Reg = MO.getReg();
849 unsigned Reg = MO.getReg();
[all...] |
| TargetInstrInfo.cpp | 135 unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0;
136 unsigned Reg1 = MI->getOperand(Idx1).getReg();
137 unsigned Reg2 = MI->getOperand(Idx2).getReg();
228 MO.setReg(Pred[j].getReg());
286 MI->substituteRegister(MI->getOperand(0).getReg(), DestReg, SubIdx, TRI);
319 unsigned FoldReg = FoldOp.getReg();
320 unsigned LiveReg = LiveOp.getReg();
328 if (TargetRegisterInfo::isPhysicalRegister(LiveOp.getReg()))
329 return RC->contains(LiveOp.getReg()) ? RC : 0;
399 storeRegToStackSlot(*MBB, Pos, MO.getReg(), MO.isKill(), FI, RC, TRI)
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 550 unsigned getReg() const {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86AsmPrinter.cpp | 243 unsigned Reg = MO.getReg();
277 bool HasBaseReg = BaseReg.getReg() != 0;
279 BaseReg.getReg() == X86::RIP)
283 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
299 assert(IndexReg.getReg() != X86::ESP &&
306 if (IndexReg.getReg()) {
321 if (Segment.getReg()) {
338 if (SegReg.getReg()) {
346 if (BaseReg.getReg()) {
351 if (IndexReg.getReg()) {
[all...] |
| X86MCInstLower.cpp | 242 Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg()) ||
246 unsigned Reg = Inst.getOperand(0).getReg();
261 unsigned Op0 = Inst.getOperand(0).getReg(), Op1 = Inst.getOperand(1).getReg();
307 unsigned Reg = Inst.getOperand(RegOp).getReg();
323 (Inst.getOperand(AddrBase + 0).getReg() != 0 ||
324 Inst.getOperand(AddrBase + 2).getReg() != 0 ||
325 Inst.getOperand(AddrBase + 4).getReg() != 0 ||
350 MCOp = MCOperand::CreateReg(MO.getReg());
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcAsmPrinter.cpp | 109 O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
149 MI->getOperand(opNum+1).getReg() == SP::G0)
166 assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
168 assert(MO.getReg() != SP::O7 &&
170 operand = "%" + StringRef(getRegisterName(MO.getReg())).lower();
|
| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| SystemZInstPrinter.cpp | 35 O << '%' << getRegisterName(MO.getReg());
146 printAddress(MI->getOperand(OpNum).getReg(),
152 printAddress(MI->getOperand(OpNum).getReg(),
154 MI->getOperand(OpNum + 2).getReg(), O);
159 unsigned Base = MI->getOperand(OpNum).getReg();
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 236 return MI.getOperand(Op).getReg() == ARM::CPSR;
422 unsigned Reg = MO.getReg();
452 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
573 (MCOp2.getReg() == 0 || MCOp2.getReg() == ARM::CPSR)) {
740 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg());
741 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg());
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/back/ |
| FirstFitLocalCombiningAllocator.java | 172 regs.append(reg.getReg());
192 int ssaReg = ssaSpec.getReg();
257 if (!ssaRegsMapped.get(ssaSpec.getReg())
292 if (ssaRegsMapped.get(spec.getReg())) {
320 && !ssaRegsMapped.get(ssaSpec.getReg())
463 int moveReg = moveRegSpec.getReg();
485 int checkReg = checkRegSpec.getReg();
582 if (ssaRegsMapped.get(spec.getReg())) continue;
696 int ssaReg = ssaSpec.getReg();
706 ssaSpec.getReg(), ropReg, ssaSpec.getCategory())
[all...] |
| LivenessAnalyzer.java | 239 interference.add(regV, rs.getReg());
270 interference.add(phis.get(i).getResult().getReg(),
271 phis.get(j).getResult().getReg());
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| FirstFitLocalCombiningAllocator.java | 168 regs.append(reg.getReg());
188 int ssaReg = ssaSpec.getReg();
253 if (!ssaRegsMapped.get(ssaSpec.getReg())
288 if (ssaRegsMapped.get(spec.getReg())) {
316 && !ssaRegsMapped.get(ssaSpec.getReg())
459 int moveReg = moveRegSpec.getReg();
481 int checkReg = checkRegSpec.getReg();
578 if (ssaRegsMapped.get(spec.getReg())) continue;
692 int ssaReg = ssaSpec.getReg();
702 ssaSpec.getReg(), ropReg, ssaSpec.getCategory())
[all...] |
| LivenessAnalyzer.java | 240 interference.add(regV, rs.getReg());
271 interference.add(phis.get(i).getResult().getReg(),
272 phis.get(j).getResult().getReg());
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
| Form3rc.java | 128 int first = regs.get(0).getReg();
137 if (one.getReg() != next) {
166 firstReg = regs.get(0).getReg();
|
| Form21h.java | 75 unsignedFitsInByte(regs.get(0).getReg()))) {
118 write(out, opcodeUnit(insn, regs.get(0).getReg()), bits);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUInstrInfo.cpp | 248 if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
249 const TargetRegisterClass * oldRegClass = MRI.getRegClass(MO.getReg());
254 MRI.setRegClass(MO.getReg(), newRegClass);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 64 unsigned RegNo = MO.getReg();
86 O << getRegisterName(MO1.getReg())
96 O << getRegisterName(MO1.getReg())
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUInstrInfo.cpp | 248 if (TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
249 const TargetRegisterClass * oldRegClass = MRI.getRegClass(MO.getReg());
254 MRI.setRegClass(MO.getReg(), newRegClass);
|
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 79 assert(MO.isReg() && MO.getReg());
388 unsigned DstReg = MI.getOperand(OpIdx++).getReg();
463 unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
520 DstReg = MI.getOperand(OpIdx++).getReg();
544 GetDSubRegs(MO.getReg(), RegSpc, TRI, D0, D1, D2, D3);
593 unsigned SrcReg = MI.getOperand(OpIdx++).getReg();
617 unsigned DstReg = MI.getOperand(0).getReg();
[all...] |
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 57 MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
236 unsigned CCReg = MI->getOperand(OpNo).getReg();
256 if (MI->getOperand(OpNo+1).getReg() == PPC::R0)
268 if (MI->getOperand(OpNo).getReg() == PPC::R0)
302 const char *RegName = getRegisterName(Op.getReg());
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 233 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
234 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
246 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
247 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCCodeEmitter.cpp | 147 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
148 return 0x80 >> TM.getRegisterInfo()->getEncodingValue(MO.getReg());
281 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7);
282 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| LocalList.java | 268 return spec.getReg();
425 if (test.getRegisterSpec().getReg() == reg) {
577 int regNum = startedLocal.getReg();
713 int regNum = endedLocal.getReg();
783 int regNum = endedLocal.getReg();
795 if (entry.getRegisterSpec().getReg() == regNum) {
851 int regNum = spec.getReg();
879 int regNum = spec.getReg();
|
