HomeSort by relevance Sort by last modified time
    Searched refs:isReg (Results 126 - 150 of 163) sorted by null

1 2 3 4 56 7

  /external/llvm/lib/Target/X86/MCTargetDesc/
X86AsmBackend.cpp 247 if (Op.isReg() && Op.getReg() == X86::RIP)
  /external/llvm/lib/Target/X86/
X86CodeEmitter.cpp 181 if (MO.isReg()) {
211 if (MO.isReg()) {
231 if (MO.isReg()) {
    [all...]
X86InstrInfo.cpp     [all...]
X86FrameLowering.cpp 123 if (!MO.isReg() || MO.isDef())
553 if (!MI.getOperand(0).isReg() ||
    [all...]
  /external/llvm/lib/CodeGen/
StrongPHIElimination.cpp 227 if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
538 if (!MO.isReg() || !MO.isDef())
IfConversion.cpp     [all...]
MachineBasicBlock.cpp 725 if (!OI->isReg() || OI->getReg() == 0 ||
746 if (!OI->isReg() || OI->getReg() == 0)
    [all...]
ScheduleDAGInstrs.cpp 215 if (!MO.isReg() || MO.isDef()) continue;
756 if (!MO.isReg()) continue;
    [all...]
PrologEpilogInserter.cpp     [all...]
RegisterPressure.cpp 360 if (!MO.isReg() || !MO.getReg())
ShrinkWrapping.cpp 418 if (! (MO.isReg() && (MO.isUse() || MO.isDef())))
    [all...]
TailDuplication.cpp 425 if (!MO.isReg())
    [all...]
  /external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 948 bool isReg() const { return Kind == k_Register; }
    [all...]
  /external/llvm/lib/Target/X86/AsmParser/
X86AsmParser.cpp 852 bool isReg() const { return Kind == Register; }
    [all...]
  /external/llvm/utils/TableGen/
FixedLenDecoderEmitter.cpp     [all...]
  /external/llvm/lib/Target/AArch64/
AArch64FrameLowering.cpp 226 assert(RetOpcode == AArch64::TC_RETURNxi && JumpTarget.isReg()
  /external/llvm/lib/Target/Mips/
MipsLongBranch.cpp 230 if (!MO.isReg()) {
  /external/llvm/lib/Target/PowerPC/
PPCCTRLoops.cpp 532 if (MO.isReg()) {
PPCInstrInfo.cpp 834 if (UseMI->getOperand(UseIdx).isReg() &&
    [all...]
  /external/llvm/lib/CodeGen/AsmPrinter/
DwarfDebug.cpp     [all...]
AsmPrinter.cpp 544 assert(Op.isReg() && "KILL instruction must have only register operands");
575 bool Deref = MI->getOperand(0).isReg() && MI->getOperand(1).isImm();
599 if (MI->getOperand(0).isReg()) {
    [all...]
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 239 if (MO.isReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
507 (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)) {
    [all...]
Thumb1RegisterInfo.cpp 540 if (!MO.isReg() || MO.isUndef() || !MO.getReg() ||
  /external/llvm/lib/Target/SystemZ/
SystemZInstrInfo.cpp 463 if (Op.isReg() && Op.isKill())
  /external/llvm/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp 342 MIB->getOperand(Idx-1).isReg() &&
    [all...]

Completed in 4156 milliseconds

1 2 3 4 56 7