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    Searched full:enablepostrascheduler (Results 1 - 11 of 11) sorted by null

  /external/llvm/include/llvm/Target/
TargetSubtargetInfo.h 65 // enablePostRAScheduler - If the target can benefit from post-regalloc
70 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
  /external/llvm/lib/Target/
TargetSubtargetInfo.cpp 29 bool TargetSubtargetInfo::enablePostRAScheduler(
  /external/llvm/lib/Target/PowerPC/
PPCSubtarget.h 204 /// enablePostRAScheduler - True at 'More' optimization.
205 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
PPCSubtarget.cpp 162 bool PPCSubtarget::enablePostRAScheduler(
  /external/llvm/lib/Target/ARM/
ARMSubtarget.h 313 /// enablePostRAScheduler - True at 'More' optimization.
314 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
ARMSubtarget.cpp 274 bool ARMSubtarget::enablePostRAScheduler(
  /external/llvm/lib/Target/Mips/
MipsSubtarget.cpp 101 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
MipsSubtarget.h 131 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
  /external/llvm/lib/CodeGen/
PostRASchedulerList.cpp 56 // TargetSubtargetInfo.enablePostRAScheduler(). This flag can be used to
59 EnablePostRAScheduler("post-RA-scheduler",
266 if (EnablePostRAScheduler.getPosition() > 0) {
267 if (!EnablePostRAScheduler)
273 if (!ST.enablePostRAScheduler(PassConfig->getOptLevel(), AntiDepMode,
  /external/llvm/lib/Target/X86/
X86Subtarget.h 388 /// enablePostRAScheduler - run for Atom optimization.
389 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
X86Subtarget.cpp 514 bool X86Subtarget::enablePostRAScheduler(

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