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  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
AMDGPUISelLowering.cpp 72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
84 Op.getNode()->dump();
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
127 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1),
130 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1),
133 return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1)
    [all...]
AMDILISelLowering.cpp 329 DST = SDValue(Op.getNode(), 0);
348 DST = SDValue(Op.getNode(), 0);
362 Nodes1 = DAG.getNode(AMDGPUISD::VBUILD,
384 Nodes1 = DAG.getNode(
395 Nodes1 = DAG.getNode(
406 Nodes1 = DAG.getNode(
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
480 Result = DAG.getNode(
    [all...]
  /external/mesa3d/src/gallium/drivers/radeon/
AMDGPUISelLowering.cpp 72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
84 Op.getNode()->dump();
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
127 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1),
130 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1),
133 return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1)
    [all...]
AMDILISelLowering.cpp 329 DST = SDValue(Op.getNode(), 0);
348 DST = SDValue(Op.getNode(), 0);
362 Nodes1 = DAG.getNode(AMDGPUISD::VBUILD,
384 Nodes1 = DAG.getNode(
395 Nodes1 = DAG.getNode(
406 Nodes1 = DAG.getNode(
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
480 Result = DAG.getNode(
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 169 // SDValue.getNode() == 0 - No change was made
170 // SDValue.getNode() == N - N was replaced, is dead and has been handled.
494 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(),
499 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(),
513 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(),
524 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(),
530 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(),
537 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(),
541 return DAG.getNode(ISD::FP_ROUND, SDLoc(Op), Op.getValueType(),
580 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()
    [all...]
LegalizeVectorOps.cpp 133 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i)
144 SDNode* Node = Op.getNode();
152 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0);
155 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
164 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
279 if (Tmp1.getNode()) {
299 Result = DAG.UnrollVectorOp(Op.getNode());
320 assert(Op.getNode()->getNumValues() == 1 &&
328 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
333 Op = DAG.getNode(Op.getOpcode(), dl, NVT, &Operands[0], Operands.size())
    [all...]
LegalizeIntegerTypes.cpp 143 if (Res.getNode())
156 return DAG.getNode(ISD::AssertSext, SDLoc(N),
163 return DAG.getNode(ISD::AssertZext, SDLoc(N),
220 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp));
224 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp));
231 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
245 InOp = DAG.getNode(ISD::ANY_EXTEND, dl,
249 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
256 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
259 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT
    [all...]
LegalizeTypesGeneric.cpp 54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
82 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp,
84 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InNVT, InOp
    [all...]
SelectionDAGBuilder.cpp 135 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
136 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
142 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi);
156 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
157 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi,
160 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo);
161 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi);
168 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]);
169 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]);
172 Val = DAG.getNode(ISD::BUILD_PAIR, DL, ValueVT, Lo, Hi)
    [all...]
LegalizeDAG.cpp 174 ReplacedNode(Old.getNode());
322 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val);
363 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
365 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment);
387 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
404 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
411 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
420 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2);
445 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad);
447 Result = DAG.getNode(VT.isFloatingPoint() ? ISD::FP_EXTEND
    [all...]
LegalizeVectorTypes.cpp 124 if (R.getNode())
131 return DAG.getNode(N->getOpcode(), SDLoc(N),
139 return DAG.getNode(N->getOpcode(), SDLoc(N),
151 return DAG.getNode(ISD::BITCAST, SDLoc(N),
161 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
177 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
185 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
191 return DAG.getNode(ISD::FPOWI, SDLoc(N),
202 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
230 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op)
    [all...]
ResourcePriorityQueue.cpp 79 const SDNode *ScegN = PredSU->getNode();
117 const SDNode *ScegN = SuccSU->getNode();
135 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
248 if (!SU || !SU->getNode())
253 if (SU->getNode()->getGluedNode())
258 if (SU->getNode()->isMachineOpcode())
259 switch (SU->getNode()->getMachineOpcode()) {
262 SU->getNode()->getMachineOpcode())))
293 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) {
298 if (SU->getNode() && SU->getNode()->isMachineOpcode())
    [all...]
  /external/apache-harmony/prefs/src/test/java/org/apache/harmony/prefs/tests/java/util/prefs/
PreferenceChangeEventTest.java 46 assertSame(Preferences.userRoot(), event.getNode());
52 assertSame(Preferences.userRoot(), event.getNode());
58 assertSame(Preferences.userRoot(), event.getNode());
64 assertSame(Preferences.userRoot(), event.getNode());
73 assertSame(Preferences.userRoot(), event.getNode());
  /external/llvm/lib/Target/R600/
AMDILISelLowering.cpp 302 DST = SDValue(Op.getNode(), 0);
320 DST = SDValue(Op.getNode(), 0);
339 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
345 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
347 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
383 Result = DAG.getNode(
411 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS);
414 jq = DAG.getNode(ISD::SRA, DL, OVT, jq, DAG.getConstant(bitsize - 2, OVT));
417 jq = DAG.getNode(ISD::OR, DL, OVT, jq, DAG.getConstant(1, OVT));
429 SDValue fa = DAG.getNode(ISD::SINT_TO_FP, DL, FLTTY, ia)
    [all...]
AMDGPUISelLowering.cpp 164 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
175 Op.getNode()->dump();
222 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
226 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
228 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
231 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1),
234 return DAG.getNode(AMDGPUISD::UMAX, DL, VT, Op.getOperand(1),
237 return DAG.getNode(AMDGPUISD::FMIN, DL, VT, Op.getOperand(1),
240 return DAG.getNode(AMDGPUISD::SMIN, DL, VT, Op.getOperand(1),
243 return DAG.getNode(AMDGPUISD::UMIN, DL, VT, Op.getOperand(1)
    [all...]
R600ISelLowering.cpp 516 return DAG.getNode(AMDGPUISD::EXPORT, SDLoc(Op), Op.getValueType(),
646 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs, 19);
650 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
652 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
654 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
656 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
658 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
660 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2),
662 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1),
664 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2)
    [all...]
  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp     [all...]
ARMSelectionDAGInfo.cpp 67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
106 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
115 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
129 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
171 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
173 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src)
    [all...]
  /external/smack/src/org/jivesoftware/smackx/pubsub/
OptionsExtension.java 62 if (getNode() != null)
63 XmlUtils.appendAttribute(builder, "node", getNode());
SubscribeExtension.java 48 if (getNode() != null)
51 builder.append(getNode());
UnsubscribeExtension.java 63 if (getNode() != null)
64 XmlUtils.appendAttribute(builder, "node", getNode());
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp 86 return DAG.getNode(ISD::BUILD_VECTOR, dl, ResultVT,
90 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
137 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec,
    [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZSelectionDAGInfo.cpp 41 return DAG.getNode(SystemZISD::MVC, DL, MVT::Other,
92 Dst = DAG.getNode(ISD::ADD, DL, DstVT, Dst,
97 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
106 SDValue Dst2 = DAG.getNode(ISD::ADD, DL, DstVT, Dst,
111 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2);
120 SDValue Dst2 = DAG.getNode(ISD::ADD, DL, DstVT, Dst,
122 return DAG.getNode(SystemZISD::MVC, DL, MVT::Other, Chain, Dst2, Dst,
  /external/llvm/include/llvm/CodeGen/
MachinePostDominators.h 50 return DT->getNode(BB);
53 MachineDomTreeNode *getNode(MachineBasicBlock *BB) const {
54 return DT->getNode(BB);
  /external/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 171 SDNode *ADDCNode = ADDENode->getOperand(2).getNode();
178 SDNode *MultNode = MultHi.getNode();
182 if (MultLo.getNode() != MultNode)
207 SDValue ACCIn = CurDAG->getNode(MipsISD::InsertLOHI, DL, MVT::Untyped,
214 SDValue MAdd = CurDAG->getNode(MultOpc, DL, MVT::Untyped,
222 SDValue LoOut = CurDAG->getNode(MipsISD::ExtractLOHI, DL, MVT::i32, MAdd,
228 SDValue HiOut = CurDAG->getNode(MipsISD::ExtractLOHI, DL, MVT::i32, MAdd,
247 SDNode *SUBCNode = SUBENode->getOperand(2).getNode();
254 SDNode *MultNode = MultHi.getNode();
258 if (MultLo.getNode() != MultNode
    [all...]

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1 2 3 4 5 6 7 8 91011>>