1 //===-- SIRegisterInfo.h - SI Register Info Interface ----------*- C++ -*--===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 /// \file 11 /// \brief Interface definition for SIRegisterInfo 12 // 13 //===----------------------------------------------------------------------===// 14 15 16 #ifndef SIREGISTERINFO_H_ 17 #define SIREGISTERINFO_H_ 18 19 #include "AMDGPURegisterInfo.h" 20 21 namespace llvm { 22 23 class AMDGPUTargetMachine; 24 25 struct SIRegisterInfo : public AMDGPURegisterInfo { 26 AMDGPUTargetMachine &TM; 27 28 SIRegisterInfo(AMDGPUTargetMachine &tm); 29 30 virtual BitVector getReservedRegs(const MachineFunction &MF) const; 31 32 virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC, 33 MachineFunction &MF) const; 34 35 /// \param RC is an AMDIL reg class. 36 /// 37 /// \returns the SI register class that is equivalent to \p RC. 38 virtual const TargetRegisterClass * 39 getISARegClass(const TargetRegisterClass *RC) const; 40 41 /// \brief get the register class of the specified type to use in the 42 /// CFGStructurizer 43 virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const; 44 45 /// \brief Return the 'base' register class for this register. 46 /// e.g. SGPR0 => SReg_32, VGPR => VReg_32 SGPR0_SGPR1 -> SReg_32, etc. 47 const TargetRegisterClass *getPhysRegClass(unsigned Reg) const; 48 }; 49 50 } // End namespace llvm 51 52 #endif // SIREGISTERINFO_H_ 53
