1 ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s -check-prefix=32 2 ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2 3 ; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64 4 ; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2 5 ; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefix=NO-NAN 6 7 define float @foo0(float %a) nounwind readnone { 8 entry: 9 10 ; 32: lui $[[T0:[0-9]+]], 32767 11 ; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 12 ; 32: and $[[AND:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] 13 ; 32: mtc1 $[[AND]], $f0 14 15 ; 32R2: ins $[[INS:[0-9]+]], $zero, 31, 1 16 ; 32R2: mtc1 $[[INS]], $f0 17 18 ; NO-NAN: abs.s 19 20 %call = tail call float @fabsf(float %a) nounwind readnone 21 ret float %call 22 } 23 24 declare float @fabsf(float) nounwind readnone 25 26 define double @foo1(double %a) nounwind readnone { 27 entry: 28 29 ; 32: lui $[[T0:[0-9]+]], 32767 30 ; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 31 ; 32: and $[[AND:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] 32 ; 32: mtc1 $[[AND]], $f1 33 34 ; 32R2: ins $[[INS:[0-9]+]], $zero, 31, 1 35 ; 32R2: mtc1 $[[INS]], $f1 36 37 ; 64: daddiu $[[T0:[0-9]+]], $zero, 1 38 ; 64: dsll $[[T1:[0-9]+]], ${{[0-9]+}}, 63 39 ; 64: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1 40 ; 64: and $[[AND:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] 41 ; 64: dmtc1 $[[AND]], $f0 42 43 ; 64R2: dins $[[INS:[0-9]+]], $zero, 63, 1 44 ; 64R2: dmtc1 $[[INS]], $f0 45 46 ; NO-NAN: abs.d 47 48 %call = tail call double @fabs(double %a) nounwind readnone 49 ret double %call 50 } 51 52 declare double @fabs(double) nounwind readnone 53
